Semiconductor Packaging Component Quality Engineer

Cisco•San Jose, CA

4d•$154,900 - $225,300

About The Position

The Component Quality and Technology (CQT) organization is seeking a detail-oriented and proactive Semiconductor Packaging Component Quality Engineer to serve as a technical expert in component integrity. The role evaluates the quality, reliability, and physical integrity of packaged semiconductor components, working with leaders in Quality, Reliability, Component Engineering, and Supply Chain in a global team focused on technical rigor, continuous improvement, and collaborative problem-solving. The engineer assesses incoming packaged components from external suppliers, reviews or conducts board-level reliability testing, oversees failure analysis, works with suppliers and OSATs on packaging quality, and evaluates supplier-driven package process changes against internal quality standards.

Requirements

Bachelor’s degree in Electrical Engineering, Mechanical Engineering, Materials Science, or a related field.
At least 4 years of experience in semiconductor quality, packaging reliability, or board-level failure analysis.
Strong understanding of standard IC packaging types, including BGA, QFN, WLCSP, and Flip-Chip, and their material, mechanical, and thermal stress behaviors.
Strong working knowledge of JEDEC and IPC standards for packaging, reliability testing, and board-level qualifications.

Nice To Haves

Direct experience designing, setting up, and executing Level 2 (L2) / Board Level Reliability (BLR) testing pipelines, including thermal cycling, mechanical shock/drop testing, board flex testing, and continuous daisy-chain resistance monitoring.
Proficiency with reliability software such as Reliasoft, Weibull++, Minitab, or JMP, and CAD/PCB layout viewers such as Allegro or Altium.
Familiarity with PCB board design principles, footprint layout constraints, and schematic routing that affect package solder joint reliability.
Formal training in structured problem-solving methodologies such as 8D, 5-Why, Fishbone analysis, or Six Sigma Green/Black Belt.

Responsibilities

Assess and lead evaluation of the quality and physical integrity of incoming packaged components from external suppliers.
Review supplier-provided data or execute BLR/L2 reliability testing to ensure component-to-board interconnect integrity for SMT manufacturing and long-term field use.
Oversee root-cause analysis of component failures, identifying package-level defects such as delamination, wire bond lifts, die cracking, and solder joint fatigue.
Partner with external component suppliers and OSATs to audit packaging processes, review manufacturing reliability data, and resolve package-level reliability excursions.
Evaluate supplier-driven package process changes (PCNs) and determine whether they align with internal quality standards.

Benefits

Medical insurance
Dental insurance
Vision insurance
401(k) plan with Cisco matching contribution
Paid parental leave
Short- and long-term disability coverage
Basic life insurance
Cisco restricted stock unit grants may be available, subject to eligibility and continued employment.
10 paid holidays per full calendar year
One floating holiday for non-exempt employees
One paid day off for the employee’s birthday
Paid year-end holiday shutdown
Four paid personal wellness days
Paid vacation time for non-exempt employees; exempt employees participate in a flexible vacation time-off program with no defined limit, subject to availability and business limitations.
80 hours of sick time off on hire and each January 1 thereafter, with up to 80 unused hours carried forward.
Additional paid time away may be requested for critical or emergency family issues.
Optional 10 paid volunteer days per full calendar year
Annual bonuses may be available for non-sales roles, subject to Cisco policies.