Semiconductor Design Engineer (Compute Test, Oregon)

TeradyneTualatin, OR
$154,900 - $247,800Onsite

About The Position

The Semiconductor Design Engineer will play a key role within Teradyne’s Compute Test Division Engineering team, focusing on the development of advanced test instrumentation. This role supports architecture, design, implementation, verification, and lab validation in a dynamic, multi-site engineering environment. The ideal candidate will bring strong digital logic design expertise, hands-on FPGA experience, and the ability to collaborate across hardware, software, systems, and verification teams.

Requirements

  • BS in Electrical Engineering or a related field required; advanced degree preferred.
  • Minimum of 10 years of practical hardware development experience.
  • Primary experience in digital logic design and FPGA physical design, including floor-planning, place and route, and static timing analysis.
  • Expertise with Verilog and a scripting language such as Python, TCL, or PERL.
  • Experience with Xilinx and/or Intel FPGAs; standard cell ASIC design experience preferred.
  • Familiarity with SystemVerilog, UVM, VHDL, C, and C++ preferred.
  • Working knowledge of PCIe, AXI, DDRx, SERDES, USB, I2C, SPI, 10/100GE, PLL, HBM, DLL, ADC, DAC, MIPI, DisplayPort, and PRBS technologies.
  • Experience with Windows and Linux operating systems, as well as development tools including Cadence Xcelium, Synopsys SpyGlass CDC/LINT, Xilinx Vivado, Intel Quartus, ClearCase, Git, SVN, JIRA, and continuous integration methodologies.
  • Understanding of design for high-speed signal integrity.
  • Excellent troubleshooting, debugging, and problem-solving skills.
  • Strong verbal, written, and presentation skills.
  • Experience working in cross-functional teams designing complex systems.
  • Commitment to excellence, efficiency, mentorship, and product quality.

Nice To Haves

  • advanced degree preferred
  • standard cell ASIC design experience preferred
  • Familiarity with SystemVerilog, UVM, VHDL, C, and C++ preferred.

Responsibilities

  • Lead architecture, design, implementation, verification, and lab validation for test instruments and systems.
  • Develop scalable, high-performance, high-quality, extensible, and maintainable digital design solutions.
  • Collaborate with hardware, software, systems, and design verification teams to define requirements and achieve appropriate test coverage.
  • Build and execute product integration, verification testing, debug, prototyping, and characterization experiments.
  • Mentor junior engineers and provide technical leadership for FPGA project teams.
  • Support logic design process improvement initiatives and tool evaluations to sustain engineering excellence and product quality.

Benefits

  • medical
  • dental
  • vision
  • Flexible Spending Accounts
  • retirement savings plans
  • life and disability insurance
  • paid vacation & holidays
  • tuition assistance programs
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