About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, our vision is to transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, Micron develops technologies that accelerate the transformation of information into intelligence. The DRAM Engineering Group (DEG) creates advanced memory solutions that enable modern applications, including artificial intelligence, high-performance computing, and immersive user experiences. Our team fosters innovation, collaboration, integrity, and continuous learning while solving some of the industry’s most complex engineering challenges. The Semiconductor Design Engineer will contribute to the design, simulation, optimization, and validation of digital and analog CMOS circuits for advanced DRAM and emerging memory technologies. This role provides opportunities to work across the full product lifecycle, from early technology development through product qualification, while collaborating with global design, verification, and manufacturing teams. The successful candidate will develop technical expertise in memory design, circuit analysis, and design automation while supporting the delivery of high-quality products.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related technical field.
  • Demonstrated foundational knowledge of CMOS circuit design, semiconductor devices, and device physics.
  • Experience or academic exposure to circuit simulation and modeling tools such as FINESIM, HSPICE, SPICE, or VERILOG.
  • Understanding of digital logic design, state machines, and design verification methodologies.
  • Strong analytical, problem-solving, written communication, and collaboration skills in a fast-paced engineering environment.

Nice To Haves

  • Experience or coursework in memory design technologies such as DRAM, NAND, SRAM, high-speed circuits, or mixed-signal design.
  • Familiarity with Cadence Virtuoso, physical design flows, layout methodologies, and power delivery network (PDN) analysis.
  • Programming or scripting experience using Python, Tcl, Perl, or similar languages to support design automation and workflow optimization.
  • Experience using AI Assisted development tools, Code Assist, LLMs, or Generative AI technologies to enhance engineering productivity, analysis, and technical problem-solving.

Responsibilities

  • Design, simulate, analyze, and optimize CMOS memory circuits and functional blocks, including memory arrays, control logic, datapaths, address decoding, and input/output interfaces.
  • Support physical design activities such as floor planning, placement, routing optimization, layout verification, and manufacturability improvements.
  • Perform circuit simulations and debugging using industry-standard tools (e.g., FINESIM, HSPICE, VERILOG), and analyze results across operating conditions and performance targets.
  • Collaborate with Product Engineering, Process Integration, Test, Assembly, CAD, Modeling, Verification, and other multi-functional partners to ensure product quality, reliability, and successful tape-out execution.
  • Leverage AI Assisted design tools, Agentic AI workflows, Generative AI solutions, and automation methodologies to improve simulation efficiency, design exploration, debug processes, and engineering productivity.

Benefits

  • Choice of medical, dental and vision plans
  • Benefit programs that help protect your income if you are unable to work due to illness or injury
  • Paid family leave
  • Robust paid time-off program
  • Paid holidays
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