R&D Process Engineer - Plasma Systems

Keysight Technologies, Inc.•Santa Rosa, CA

9d•Onsite

About The Position

The High Frequency Technology Center (HFTC) is seeking an R&D Process Engineer to develop, maintain and optimize manufacturing processes to fabricate passive interposer substrates for Keysight’s Heterogeneous Integration technology. This position is onsite at Keysight Headquarters in Santa Rosa, CA. The Process Engineer will own process development and process control to meet quality and production metrics. Responsibilities include a combination of R&D and manufacturing in partnership with Design, Integration, Test, Operations, Maintenance, Product and Failure Analysis teams. The Process Engineer is accountable for yield, cycle time, throughput, and quality of their process. This role involves technical depth in semiconductor processing, strong hands-on aptitude, as well as effective communication and teamwork to meet department-level objectives.

Requirements

Knowledge of plasma systems such as Dryetch, PVD/sputtering, CVD/PECVD, or similar vacuum processes.
Familiarity with vacuum systems, RF power delivery, gas‑flow control, and chamber‑hardware configurations.
Strong problem‑solving skills for measurement anomalies and tool‑drift issues.
Experience with statistical process control (SPC) and design of experiments (DOE) is required.
M.S. or Ph.D. in Materials Science, Chemical Engineering, Physics, Chemistry, or related fields.
5+ years of professional, hands-on experience with development and/or maintaining semiconductor processes and equipment.
Candidates must have strong problem-solving and analytical skills as well as excellent interpersonal and communication skills for cross-functional interactions.
Strong accountability, self-initiative and proactive attitude are required for success.
Candidates must be local or willing to relocate to Santa Rosa, CA.
Candidates must be a U.S. citizen or lawful permanent resident of the U.S., or protected individual, having authorization from the U.S. government for export-controlled items under 8 U.S.C. 1324b(a)(3).

Nice To Haves

Recent graduates with extensive cleanroom and experimental background will also be considered.

Responsibilities

Process development and sustaining of custom, cutting-edge, micro and nano-fabrication technologies.
Focus on process development, manufacturing sustainability, and R&D support for new product introductions, with specialization in wafer fab processes.
Deep knowledge and expertise with wafer process development in one or more of the following areas: Dryetch, PVD/sputtering, CVD/PECVD, ashing, or similar vacuum processes.
Own and advance plasma process performance across etch, CVD, PVD, and/or ashing tools by driving film quality, profiles, uniformity, selectivity, chamber health, defect reduction, and overall process robustness through structured DOEs.
Collaborate with equipment engineering on tool performance optimization, preventive‑maintenance strategies, throughput enhancements, and new tool installs or upgrades.
Drive process control and stability through SPC charting, daily reviews, root‑cause analysis, and corrective actions using statistical tools (e.g., JMP).
Working closely with other process, integration, product, and circuit design engineers to define process and performance targets.
Defining process flows, develop new processes and drive continuous process improvement (CPI) efforts to maximize product yield.
Report process metrics, root cause investigations, and process change implementations at the department level.
Ensuring successful process hand off to manufacturing partners.
Working with Operations to implement robust process control and support production processes; diagnose and resolve process problems with urgency.
Leading capital equipment acquisition projects that include tool evaluation, characterization, process development, and qualification.
Broader experience in upstream and downstream processes and the ability to understand process interactions.