The Project Engineer II serves as a technical leader and is responsible for cost and schedule while guiding FPGA teams through the architecture, design, testing, and validation of systems with multiple high-reliability FPGA applications for ground, aerospace, and space-based systems. The role bridges complex digital architecture and project execution to deliver SoC designs on cost, schedule, and technical specification. The engineer leads the FPGA development team as Agile Scrum Master, facilitates Scrum ceremonies, manages the Jira backlog, and oversees project cost, schedule, and technical requirements. The role also leads cross-functional integration and communicates technical and programmatic roadmaps to internal leadership and external customers, including NASA, DoW, and NOAA. On the technical side, the role leads SMEs in architecting FPGA SoC designs using AMD (Xilinx) software and IP, including SOC architectures, digital filters, image processing algorithms, and communication protocols. It applies design techniques for high-precision, radiation-hardened space-flight electronics, mentors engineers in HDL implementation, and oversees requirements flow-down and qualification processes for flight-space-qualified electronics. The position requires a regular and predictable work schedule and on-site work at least three days each normally scheduled week at the primary work location. Work may take place in an office, laboratory, production floor, cleanroom, outdoors, or a remote research environment. Occasional work in production areas may require protective equipment, and access to other facilities may occur in various weather conditions.
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Job Type
Full-time
Career Level
Mid Level