Product Development Engineer

Micron TechnologyBoise, ID

About The Position

As a DFT (Design for Test) Product Development Engineer in the DRAM Technology group, you will be part of a forward-thinking team of engineers that solves complex problems to develop industry-leading DRAM. In this role, you will gain an in-depth understanding of semiconductor memory functionality and become an expert in the test manufacturing code and testing techniques used to develop, implement, validate, and ensure device performance. You will engage with new technology at the build start to cultivate DFT and Micron’s component test flow philosophy on modern architectures. This will be accomplished through innovation and by multi-functional engagement with partner groups – Build, Test, Technology Development, Manufacturing, Marketing, and Quality Assurance departments.

Requirements

  • Experience in digital circuits, including understanding defect mechanisms and potential failure modes.
  • Background in designing test methods and developing program test patterns for digital logic circuits.
  • Proficiency in debugging test patterns and test scripts across various software and hardware environments.
  • Programming skills in Python, Java, Unix, Perl, Shell, or C++.
  • Strong algorithmic problem-solving approach.
  • Working knowledge of Verilog navigation and simulation.

Nice To Haves

  • Understanding of computer architecture, system‑level behavior, and memory subsystem interactions.
  • Knowledge of device physics principles related to DRAM technology.
  • Experience with burn‑in characterization and related methodologies.
  • Demonstrated ability to drive yield improvement initiatives and test strategy enhancements.
  • Proven track record of implementing new DFT methods to improve testing efficiency and coverage.

Responsibilities

  • Partner with Test Manufacturing, Product Engineering, and Design Engineering to provide test guidance, set priorities, and drive improvements in product quality and yield.
  • Develop new DFT concepts and test architectures to support future enhancements in test coverage, efficiency, and test time reduction.
  • Debug and identify root causes of failures using data analysis, electrical characterization, and physical analysis techniques, adjusting testing strategies accordingly.
  • Optimize test flows and pattern sets to improve test time, throughput, and overall efficiency.
  • Support testing of new architectures, process nodes, and device functionality.

Benefits

  • Choice of medical, dental and vision plans
  • Benefit programs that help protect your income if you are unable to work due to illness or injury
  • Paid family leave
  • Robust paid time-off program
  • Paid holidays
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service