Product Development Engineer

NVIDIA•Santa Clara, CA

25d•$168,000 - $258,750

About The Position

As one of the technology industry's most desirable employers, NVIDIA is an industry leader in high performance computing, gaming and AI. NVIDIA's GPUs are extraordinary in performance and efficiency, and we are continually innovating creative ways to deliver outstanding solutions in a wide range of sectors. We are seeking Product Development Engineers who are experienced, creative problem solvers in various areas and passionate to want to make a visible impact with the work they do. As part of the Operations Product Development Engineering GPU Team, you will work on productizing NVIDIA’s chips into consumer, professional and datacenter markets.

Requirements

BS degree in electrical engineering or equivalent experience.
8+ years of work experience.
Experience with product verification and failure analysis on Verigy 93K tester.
Strong data engineering skillset, with proficiency in Python, C or C++, and statistical modeling of data using JMP software or other tools for data analysis
Solid communication and presentation skills.
Solid interpersonal skills and track record as a strong collaborator.
Dedicated and able to work with minimum supervision.

Nice To Haves

Direct working experience on using AI platforms for data analytics (Claude, cursor, lovable etc..)
Direct working experience on improving system and board level yields by enhancing ATE structural test coverage.
A 'got-getter, can get it done' attitude and independent ‘out-of-box’ thinking’.

Responsibilities

Lead failure analysis of ATE-related escapes – specifically failures seen at system-level and customer RMAs.
Determine root cause and drive corrective actions back into wafer sort and package test.
Identify systematic discrepancies between ATE, SLT and BLT results; define guard bands, screens, correlation metrics, and test methodology changes to reduce downstream fallout.
Partner with Design, DFX, Test Engineering, Hardware, PQE, and SQE teams to identify DFx and ATE coverage gaps, then influence chip-level hooks, test modes, monitors, and observability features that improve testability and outgoing quality.
Drive cross-functional forums to track end-to-end fallout across NVIDIA manufacturing, with clear ownership, closure criteria, and measurable reduction targets.
Define and build AI / data-analytics-driven workflows to identify yield limiters, fallout signatures, systematic escapes, and early indicators of customer-quality risk.