Process Integration Engineer - DRAM R&D

Micron TechnologyBoise, ID

About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the DRAM R&D Process Integration team at Micron, driving the technologies that enable every generation of memory scaling. Our work directly shapes capacitor innovation, yield, and long‑term reliability for future DRAM nodes. We thrive on solving hard integration problems and turning breakthrough ideas into manufacturable solutions! This Principal Engineer role is critical to Micron’s DRAM scaling roadmap. You will lead capacitor module development for next‑generation nodes, tackle complex cross‑module integration challenges, and influence architecture decisions from early pathfinding through high‑volume manufacturing. Your technical leadership will directly impact product performance, yield, and reliability.

Requirements

  • Master’s degree or PhD in Electrical Engineering, Microelectronics, Materials Science, Chemical Engineering, or related field
  • 5+ years of semiconductor industry experience in DRAM process integration, capacitor, or dielectric development
  • Hands‑on expertise in MIM capacitor engineering and dielectric integration
  • Experience taking capacitor processes from R&D through pilot and manufacturing ramp
  • Strong data analytics, statistical problem‑solving, and cross‑functional collaboration skills

Nice To Haves

  • Deep understanding of DRAM module interactions and system‑level integration behavior
  • Experience with advanced capacitor materials and long‑term scaling roadmap development
  • Proven technical leadership with strong ownership and execution in ambiguous problem spaces
  • Track record of innovation and influence across multi‑disciplinary engineering teams

Responsibilities

  • Architect and optimize advanced DRAM capacitor process flows, including build rules and performance specifications
  • Lead resolution of complex cross‑module integration issues across Photo, Etch, Materials, Device, and Cell
  • Drive capacitor performance and reliability improvements including Cs uniformity, leakage, TDDB, and long‑term reliability
  • Design and execute structured DOEs to accelerate learning, defect reduction, and performance improvement
  • Lead data‑driven yield improvement and support robust cross‑site technology transfer

Benefits

  • Choice of medical, dental and vision plans
  • Benefit programs that help protect your income if you are unable to work due to illness or injury
  • Paid family leave
  • Robust paid time‑off program
  • Paid holidays
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