Principal Validation Lead
About The Position
The Principal Validation Engineer (Lead) will own lab validation strategy and execution for advanced ASIC/SoC products integrating CXL 3.x, HBM, DDR, PCIe, and high-speed SerDes. The role combines hands-on silicon bring-up and debug with technical leadership of validation activities, including test planning, methodology, and coordination across design, DFT, firmware, and product/test engineering. The position includes defining and leading validation plans, bringing up silicon and lab platforms, guiding other validation engineers, operating advanced lab equipment, and developing automation and data analysis infrastructure. It also involves characterizing high-speed links and memory interfaces, leading root-cause investigations, documenting methods and results, communicating project status and risks, and mentoring junior engineers.
Requirements
- Bachelor’s degree in Computer Science, Electrical Engineering, or a related field with 10–15 years of related professional experience, or a master’s degree and/or PhD in those fields with 5–10 years of experience.
- Typically 5+ years of industry experience in silicon or system validation, including hands-on lab work.
- Strong expertise in at least two of the following: CXL (2.0/3.x), PCIe (Gen4/Gen5/Gen6), DDR (DDR4/DDR5), HBM (HBM2/2E/3), or high-speed SerDes.
- Proven experience leading bring-up and validation of complex ASIC/SoC products from first silicon through production.
- Deep hands-on experience with lab equipment, such as oscilloscopes, protocol analyzers, logic analyzers, BERTs, and power supplies, and with high-speed measurement techniques.
- Strong scripting and lab automation skills, such as Python, TCL, shell, or MATLAB, for test control and data analysis.
- Demonstrated ability to drive cross-functional debug and closure and clearly communicate complex technical issues.
- Applicants must be eligible to access export-controlled information under applicable law; applicants may be subject to an export license review process prior to employment.
Nice To Haves
- Master’s degree in Electrical Engineering, Computer Engineering, or a related field.
- Experience leading small validation teams or serving as technical lead on multi-site projects.
- Familiarity with DFT features such as scan, BIST, and JTAG and their use in bring-up and debug.
- Experience with signal integrity/power integrity concepts and working with SI/PI or board design teams.
Responsibilities
- Define validation strategy and test plans for ASIC/SoC devices with CXL 3.x, HBM, DDR, PCIe, and high-speed SerDes interfaces, covering functionality, performance, power, margining, and interoperability.
- Lead silicon bring-up and lab validation, including platform bring-up for boards, power, clocks, and resets, and interface-level validation for CXL, PCIe, DDR, HBM, and SerDes.
- Provide technical direction to validation engineers, including test plan reviews, debug guidance, and prioritization of tasks and issues.
- Configure and operate advanced lab equipment, including high-bandwidth oscilloscopes and probes, logic analyzers, PCIe/CXL protocol analyzers, BERTs, pattern generators, power supplies, electronic loads, and environmental chambers.
- Drive development of lab automation and data analysis infrastructure using Python, TCL, shell, MATLAB, or similar tools.
- Analyze data to characterize high-speed links and memory interfaces, including BER, eye diagrams, jitter, margins, throughput, latency, and power, and translate findings into design and validation recommendations.
- Lead root-cause investigations across silicon, firmware, board design, and test setup; coordinate issue closure with design, DFT, firmware, and product/test engineering.
- Document validation methodologies, lab setups, and results; communicate status, risks, and mitigation plans to project leadership.
- Mentor and coach junior validation engineers and help establish a scalable lab validation team and best practices.
Benefits
- Eligible to participate in bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
- Employee stock purchase plan with a 2-year look back.
- Family support programs.
- Mental health resources.
- Recognition and service awards.
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What This Job Offers
Job Type
Full-time
Career Level
Principal
