Principal, System HSIO Validation Engineer

Advanced Micro Devices, Inc•Santa Clara, CA

15h•Hybrid

About The Position

The High‑Speed IO (HSIO) validation engineer is responsible for driving end‑to‑end validation strategy and execution for high‑speed interfaces across CPU and GPU based platforms, spanning data center servers and AI systems. In this highly visible role, you will partner closely with PHY design, SI/PI, and platform teams to validate and debug high‑speed IO subsystems, ensuring robust silicon and system readiness for industry-leading products.

Requirements

Bachelor’s or master’s degree in Electrical Engineering, Computer Engineering, or related field, with 8+ years of experience in high-speed IO or silicon/system validation.
Strong technical expertise in high-speed serial interfaces (e.g., PCIe Gen5/Gen6, CXL, Ethernet) and associated validation and debug tools (e.g., oscilloscopes, BERTs, protocol analyzers).
Solid understanding of Tx/Rx equalization techniques (CTLE, DFE, de-emphasis), CDR architectures, and link-level behavior.
Proven experience driving complex validation efforts across silicon and system bring-up environments.
Hands-on experience with lab bring-up, test automation (e.g., Python, C/C++), and data analysis for SI/PI and functional validation.
Deep understanding of signal integrity, power integrity, and system-level debug methodologies.
Ability to operate effectively in a fast-paced, cross-functional environment and drive issues to closure.

Nice To Haves

Strong commitment to quality, innovation, and continuous improvement.

Responsibilities

Own validation strategy, planning, and execution for high‑speed IO interfaces (e.g., PCIe Gen6/Gen7, UALink, XGMI) across multiple platforms.
Define and execute comprehensive validation plans covering pre‑silicon correlation, post‑silicon bring-up, compliance, margining, and debug methodologies.
Collaborate cross-functionally with design, architecture, board, firmware, and test teams to ensure coverage completeness and accelerate issue resolution.
Develop and deploy automated validation infrastructure, lab setups, and data analysis workflows for high‑speed interface characterization.
Perform deep root-cause analysis for SI/PI issues, protocol failures, and system-level interoperability challenges, working with internal teams and external partners.
Track validation progress, communicate status and key risks, and ensure quality deliverables aligned with program milestones.