Principal Power Delivery Engineer - AI System

Hyve SolutionsFremont, CA
$214,000 - $290,000

About The Position

Modern AI accelerators demand hundreds to thousands of amps at tightly regulated voltages, making power delivery one of the defining challenges of next-generation server design. This Principal-level individual contributor role owns the architecture, design, and validation of power delivery for Hyve's AI and compute server platforms—from 48V/54V input and intermediate bus conversion through point-of-load regulation for GPUs, CPUs, and memory.

Requirements

  • Bachelor's or Master's in Electrical Engineering or a related field.
  • 10+ years of power delivery / VRM design experience for servers, GPU platforms, or high-power electronics, with proven delivery of high-current designs into production.
  • Deep knowledge of DC/DC conversion, multiphase VR design, 48V/54V architectures, PDN design and analysis, magnetics, and power component selection; experience with power simulation and bench characterization (electronic loads, oscilloscopes, thermal tools).
  • Understanding of power sequencing, telemetry, protection, and the interaction of power delivery with thermal, SI, and firmware/BMC domains.
  • Able to lead trade-off discussions and clearly present power architecture decisions to technical leaders and customers.

Responsibilities

  • Define end-to-end power delivery architecture for AI/GPU platforms, including 48V/54V direct conversion, intermediate bus, VRM/PMIC topologies, and point-of-load regulation for high-current rails.
  • Design and specify multiphase voltage regulators, select power stages, controllers, inductors, and capacitors, and drive PDN design in partnership with SI/PI and layout teams to meet impedance, transient, and IR-drop targets.
  • Optimize conversion efficiency, thermal footprint, and power density; define power sequencing, telemetry, and protection strategies in coordination with firmware/BMC teams.
  • Lead power bring-up and validation across EVT/DVT/PVT, including load-line, transient, efficiency, and reliability testing; correlate bench results and drive corrective actions.
  • Guide board designers, thermal, mechanical, and firmware teams on power-related trade-offs, set design methodology, and mentor engineers on power delivery best practices.
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