Principal Network Architect

Cornelis Networks, Inc.•Wayne, PA

13h•Remote

About The Position

Cornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world’s most demanding computational challenges with our next-generation networking solutions. We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles. You will join the Office of the CTO as a Principal Systems Architect, where you will define the architecture of next-generation AI and HPC networking solutions that power the world's largest compute clusters. In this highly visible technical leadership role, you will drive system architecture across hardware, ASIC, FPGA, firmware, software, and networking, ensuring every layer of the stack is optimized to deliver industry-leading performance, scalability, and efficiency. You will partner closely with architects, ASIC and hardware engineers, firmware and software teams, product management, solutions architects, and executive leadership to translate customer requirements and emerging technologies into innovative networking platforms. From architectural vision through production deployment, you will help shape the technical direction of future Cornelis Networks products while mentoring engineers and influencing long-term technology strategy.

Requirements

Bachelor's, Master's, or Ph.D. in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline, or equivalent practical experience.
15+ years of experience designing and architecting high-performance networking, FPGA, ASIC, or hardware acceleration solutions.
Demonstrated expertise in system architecture spanning hardware, software, firmware, and networking technologies.
Deep understanding of PCI Express, Ethernet, DMA engines, RDMA, high-speed interconnects, and modern data center networking architectures.
Experience with Linux kernel technologies, device drivers, kernel-bypass networking, or low-latency networking frameworks.
Strong C/C++ development experience supporting high-performance networking systems.
Proven experience leading complex cross-functional engineering initiatives from architectural definition through product deployment.
Excellent communication, technical leadership, and customer engagement skills.

Nice To Haves

Experience designing FPGA-based networking platforms, SmartNICs, or intelligent network adapters.
Experience with DPDK, RDMA, custom transport protocols, TCP/IP offload, or other kernel-bypass networking technologies.
Knowledge of AI infrastructure, HPC systems, GPU clusters, and large-scale distributed computing environments.
Experience developing FPGA solutions using SystemVerilog, Verilog, or High-Level Synthesis (HLS).
Familiarity with CXL, advanced memory architectures, and emerging accelerator interconnect technologies.
Experience optimizing networking performance across hardware, firmware, software, and system-level architectures.
Customer-facing architecture, technical consulting, or field engineering experience.
Experience mentoring engineering teams and influencing technical strategy across multiple organizations.

Responsibilities

Define and drive the end-to-end architecture for next-generation AI and HPC networking products, spanning hardware, firmware, software, and system integration.
Lead cross-functional architecture efforts across ASIC, FPGA, software, firmware, networking, and platform engineering teams to deliver scalable, high-performance solutions.
Design high-bandwidth, low-latency data movement architectures utilizing PCIe, RDMA, DMA engines, SmartNIC technologies, and high-speed Ethernet fabrics.
Drive hardware/software co-design to optimize networking, compute, memory, and accelerator subsystems for maximum throughput, efficiency, and deterministic latency.
Partner with ASIC and FPGA teams to define interfaces, system architecture, and integration strategies across next-generation networking platforms.
Collaborate with Linux software teams on kernel drivers, userspace networking, performance optimization, and low-latency communication technologies.
Evaluate emerging technologies including CXL, SmartNICs, advanced interconnects, hardware accelerators, and AI infrastructure to influence future product roadmaps.
Work directly with customers, solutions architects, and product management to translate technical requirements into scalable architectural solutions.
Mentor senior engineers and architects while providing technical leadership across multiple engineering organizations.
Contribute to long-term product strategy, technology direction, and architectural standards for future Cornelis Networks networking solutions.