Principal Memory Design Engineer - Sustaining, HBM

Micron Technology • Richardson, TX

22h

About The Position

Micron Technology is a world leader in innovating memory and storage solutions, with a vision to transform how the world uses information. The Heterogeneous Integration Group (HIG) at Micron is focused on developing advanced memory solutions, specifically designing and optimizing High Bandwidth Memory (HBM) products for AI/ML, high-performance computing (HPC), and data-centric systems. This team collaborates globally to deliver industry-leading performance, power efficiency, and reliability. The HBM product family is experiencing high demand from leading semiconductor companies. As a HBM Memory Design Engineer in a sustaining role, you will work with various teams including Design Engineering (DE), Product Engineering (PE), Process Integration, Packaging, and Technology Development (TD) to evaluate silicon issues across current HBM designs. You will also engage with the architecture team to understand new or modified specification requests, and contribute to implementing and verifying designs, supporting design release to silicon, and addressing future design needs. There is an opportunity to rotate into a Design Engineer role to work on next-generation HBM products.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering or a related field, or equivalent practical experience.
• 8+ years of relevant experience with a Bachelor’s degree or 6+ years with a Master’s degree.
• Extensive knowledge of CMOS circuit design and semiconductor device physics.
• Hands‑on experience with schematic entry and circuit simulation using Verilog, FastSPICE, and HSPICE.
• Strong understanding of timing, area, power, and complexity trade‑offs in Dynamic Random‑Access Memory (DRAM) or mixed‑signal design.

Nice To Haves

• Experience clearly communicating complex technical concepts in written and verbal form.
• Experience with scripting or automation using Python, Tool Command Language (TCL), Perl, or similar.
• Exposure to register‑transfer level (RTL) design flows in DRAM or foundry processes.
• Experience with DRAM product bring‑up and silicon debug.
• Exposure to advanced packaging technologies such as through‑silicon vias (TSV), hybrid bonding, interposers, or similar.

Responsibilities

• Design digital, analog, and memory core circuits using complementary metal‑oxide‑semiconductor (CMOS) logic and transistor‑level techniques, from concept through production‑ready solutions.
• Model parasitics and support design validation, reticle experiments, and required revisions for initial and subsequent tape‑outs.
• Create and guide optimized floorplans for placement, routing, power delivery networks, sense margins, array timing, and die size, including layout leadership.
• Simulate and verify designs using industry‑standard tools such as FineSim, HSPICE (Simulation Program with Integrated Circuit Emphasis), FastSPICE, and Verilog hardware description language.
• Analyze and optimize power delivery networks to meet performance, reliability, and efficiency targets.
• Debug and identify root causes for pre‑silicon and post‑silicon issues in current High Bandwidth Memory (HBM) products, driving effective solutions.
• Collaborate with standards, computer‑aided design (CAD), modeling, and verification teams, and lead design reviews and status updates to communicate progress and technical decisions.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Number of Employees: 5,001-10,000 employees