Principal Hardware Security Architect, Advanced Technologies and Threat Modeling

NVIDIA•Santa Clara, CA

1d•$272,000 - $431,250

About The Position

NVIDIA is seeking an experienced and visionary Hardware Security Architect to help drive the security roadmap for our next-generation SoCs and GPUs. This is a senior-level individual contributor position that will define, craft, and guide the implementation of security architecture for our innovative platforms, with a specific focus on emerging threats in advanced packaging, connectivity, and physical attack vectors. You will work with diverse teams across NVIDIA, external partners, and industry bodies to meet and exceed security requirements for our mobile, automotive, gaming, and data center platforms.

Requirements

MS, or PhD (or equivalent experience) in Electrical Engineering, Computer Science, or Computer Engineering.
15+ years of meaningful relevant work or research experience.
Experience with the ASIC design process and architecture of large SoCs or GPUs.
Programming and debugging fundamentals across languages such as C/C++, Verilog, ARM assembly, and Python/Perl scripting.
Deep understanding of SoC security architecture, including secure/measured boot and ARM or RISCV CPU architectures.
Direct experience with security mitigations against physical attacks including fault injection and side-channel attacks.
Knowledge of security threat modeling and penetration testing.
Familiarity with OCP S.A.F.E. or similar industry security frameworks.
The ability to work in a dynamic, customer-focused team with strong interpersonal skills.

Nice To Haves

Published research or hands-on experience securing 2.5D/3D ICs, chiplets, or System-in-Package (SiP) designs against supply-chain tampering, interconnect attacks, and hardware Trojans.
Expertise in the security risks of silicon photonics (SiPH) and optoelectronic systems, including vulnerabilities in microring resonators and quantum key distribution (QKD) hardware.
Demonstrated experience deploying AI/ML models for hardware vulnerability discovery, automated triage, or autonomous fuzzing of complex systems.
Active participation in standards bodies (e.g., OCP, IEEE) or a track record of patenting security inventions (e.g., current flattening circuits for power side-channel protection).

Responsibilities

Define Security Roadmap: Collaborate across the company to guide the direction of platform security and develop a long-term security roadmap for our products, working with hardware, software, research, and marketing teams.
Physical Security & Standards: Research, design, and develop architecture solutions that provide mitigations against physical attacks, including fault injection and side-channel attacks. Drive the adoption of and compliance with industry standards such as the Open Compute Project (OCP) S.A.F.E. (Security Appraisal Framework and Enablement) program, ensuring our firmware and hardware supply chain meets rigorous assurance requirements.
Advanced Packaging & Photonics Threat Modeling: Analyze and develop threat models for new technologies, including advanced packaging (2.5D/3D ICs, chiplets) and silicon photonics connectivity. Investigate vulnerabilities such as hardware Trojans in multi-chiplet photonic neural network accelerators, inter-chiplet side-channel analysis, and threats to optical on-chip networks.
AI-Accelerated Discovery: Employ AI and other new tools to accelerate the discovery and triage of hardware vulnerabilities. Leverage AI systems to uncover deep, previously invisible flaws at scale and shift from manual triage to AI-driven direction. Lead the evaluation of AI-assisted hardware security verification methodologies and autonomous research agents for fuzzing GPU kernel drivers.
Architecture & Verification: Review architectural, microarchitectural, and verification specifications published by internal teams to ensure all IPs align with platform security requirements. Work with customers and partners to identify and address security issues and threats.