Principal FPGA / RTL Design Engineer – Signal Processing
About The Position
Silvus Technologies, a subsidiary of Motorola Solutions, is seeking a Principal FPGA / RTL Design Engineer – Signal Processing. This role reports to the Director of FPGA Engineering and involves all aspects of the research and development process, from concept to field deployment. The engineer will be responsible for the efficient implementation of novel signal processing algorithms for Silvus' MIMO wireless networking products and will support the development of FPGA-based designs for advanced wireless systems R&D. The position is based in West Los Angeles, CA, with a hybrid schedule requiring a minimum of 3 days onsite per week (Mondays, Wednesdays, and Thursdays).
Requirements
- Bachelor of Science degree in Electrical Engineering, Computer Science, or related field.
- Minimum 10 years of demonstrated experience in RTL design and FPGA implementation; OR 8 years of RTL design and FPGA implementation experience with a Master of Science degree; OR 6 years of RTL design and FPGA implementation experience with a PhD degree.
- Demonstrated experience with fixed point binary arithmetic and digital signal processing designs.
- Proven expertise working with multiple clock-domain, high-utilization FPGA designs.
- Experience with Xilinx FPGAs, SoCs, and the Vivado IDE.
- Must be a U.S. Person (U.S. Citizen, or U.S. Permanent Resident) due to clients under U.S. federal contract.
- All employment is contingent upon the successful clearance of a background check and drug test.
Nice To Haves
- M.S. or Ph.D. degree in Electrical Engineering, Computer Science, or relevant field.
- Basic MATLAB skills.
- Solid knowledge and understanding of scripting languages such as Perl and Python.
- Strong communication and presentation skills.
- Experience with wireless communication systems on FPGA or ASIC designs.
Responsibilities
- Digital design architecting for wireless communication projects.
- Fixed point design of signal processing blocks while working with systems engineers.
- RTL coding, simulation, and test bench development.
- FPGA synthesis and timing closure.
- Hardware verification and troubleshooting; familiarity with logic analyzers.
- Provide support to the RF and Software Engineering teams.
- Perform other related duties of which the above are representative.
Benefits
- Incentive Bonus Plans
- Medical, Dental, Vision benefits
- 401K with Company Match
- 10 Paid Holidays
- Generous Paid Time Off Packages
- Employee Stock Purchase Plan
- Paid Parental & Family Leave
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What This Job Offers
Job Type
Full-time
Career Level
Principal
