Principal Firmware Engineer

Microsoft • Mountain View, CA

20h

About The Position

The Microsoft Azure team is seeking a highly experienced Principal Firmware Engineer to lead the development, debugging, and validation of next-generation firmware solutions for Microsoft AI accelerators and cloud silicon platforms. This role is focused on the design, development, debug, and deployment of silicon firmware libraries focused on Compute Domains and ANC (Accelerator Network Controller). This will require deep expertise in SoC architecture, low-level firmware, silicon bring-up, hardware/software co-design, and platform initialization flows. The candidate will serve as a technical leader driving IP Firmware library architecture across multiple silicon programs while collaborating with hardware architects, validation engineers, security, and Platform firmware and software teams. The role needs to be technical hands-on leaders who will influence architecture across teams, mentor others, drive complex initiatives, and effectively communicate with executives, customers, and engineering stakeholders.

Requirements

• Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 3+ years technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 6+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 8+ years technical engineering experience OR equivalent experience.
• Ability to meet Microsoft, customer and/or government security screening requirements are required for this role.
• Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud background check upon hire/transfer and every two years thereafter.

Nice To Haves

• 12+ years of experience in firmware, embedded systems, or SoC development.
• Proficient understanding of Memory and IO subsystem for server class SoC.
• Proven experience as a technical lead for complex silicon or firmware programs.
• Demonstrated ownership of architecture, development, and delivery of production-quality firmware.
• Expert Level Programming skills in C/C++ and Python.
• Deep Expertise in CPU and accelerator architecture, ARM/RISC architectures, On Chip Interconnect.
• Experience in designing Boot loader, Platform Initialization sequences, Silicon Abstraction layers.
• Experience in domains like Network controllers, and high-performance compute sub systems.
• Silicon bringup.
• Debug and experience in using JTAG, Lauterbach TRACE32 and other debug tools.
• Experience in using Emulation and FPGA Platforms.
• Experience with Azure hardware platforms.
• Experience with AI accelerator silicon.
• Experience with confidential computing and security firmware.
• Experience working with emulation platforms (Zebu, HAPS, Palladium, Veloce).
• Experience with firmware performance optimization and telemetry.
• Experience in RAS, reliability, and serviceability architecture.

Responsibilities

• Define and drive firmware architecture for Silicon firmware libraries for HBM, ANC, Compute, and SoC infrastructure subsystems.
• Influence microarchitecture decisions by working closely with silicon architects during specification and design phases.
• Lead firmware strategy across multiple silicon generations and platform programs.
• Provide technical leadership across firmware, hardware, validation, and software organizations.
• Develop silicon firmware libraries in C/C++ for Compute engines, ANC sub system, DMA Engines, and other similar IP blocks.
• Develop scalable and maintainable firmware frameworks and APIs.
• Lead first-silicon bring-up activities.
• Drive root-cause analysis for firmware, hardware, performance, and validation issues.
• Define firmware verification requirements and test plans.
• Lead cross-team initiatives spanning firmware, silicon architecture, software, security, and system integration.
• Create engineering alignment across geographically distributed teams.
• Collaborate with Azure hardware, platform software, systems, and validation organizations.
• Represent firmware technical direction in leadership and architecture reviews.
• Mentor engineers.
• Develop engineering best practices, coding standards, and architectural review processes.

Benefits

• The typical base pay range for this role across the U.S. is USD $142,800 - $274,800 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $188,000 - $304,200 per year.
• Certain roles may be eligible for benefits and other compensation.
• Microsoft is an equal opportunity employer.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Education Level: Ph.D. or professional degree