Principal Firmware Design Engineer

Graphcore•Austin, TX

About The Position

Graphcore is a globally recognized leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data center hardware that provide the specialized processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Austin, which will play a central role in Graphcore's work building the future of AI computing. We are looking for a Principal Firmware Design Engineer with strong experience in the Zephyr RTOS to design, develop, and maintain embedded software across server and rack-scale platforms, primarily targeted for hyperscale data center environments. The ideal candidate has deep knowledge of real-time embedded systems, SoC architectures, low-level drivers, and modern firmware development workflows. You will work closely with hardware, software, and product teams to deliver high-reliability firmware on resource-constrained platforms.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
5+ years of hands-on experience in firmware development
Hands-on experience with Zephyr RTOS, including device tree, Kconfig, board configuration, and driver development.
Experience with ARM Cortex-M or similar MCU architectures.
Solid understanding of SPI, I²C, UART, CanBus, PWM, GPIO, interrupts, DMA, and other low-level interfaces.
Familiarity with version control (Git), CI/CD workflows, and code-review practices.
Strong debugging abilities with embedded hardware and software tools.
Experience with code static analysis tools and vulnerability scanners.
Experience with system-level debug tools such as logic analyzers, JTAG, and GDB.

Nice To Haves

Experience contributing to open-source RTOS projects, ideally Zephyr.
Background in networking stacks supported by Zephyr.
Knowledge of secure firmware architectures, trusted execution environments, or cryptography libraries used in embedded systems.
Experience with MCUboot, OTA pipelines, or secure firmware provisioning.
Proficiency with Python for automation, tooling, or testing.

Responsibilities

Architecture, design, development, and deployment of Zephyr-based firmware for hyperscale server and rack management platforms. This includes kernel configuration, board bring-up, and subsystem integration.
Develop and maintain device drivers, subsystems, and middleware layers for sensors, connectivity, power management, storage, and peripherals.
Design and implement robust and scalable firmware interfaces for telemetry, power/thermal controls, remote manageability, and firmware update infrastructure.
Perform board configuration (DTS, Kconfig, build system) and debug low-level issues.
Collaborate with hardware teams and ODM partners through all phases of the design and development lifecycle. This includes schematic reviews, validation of interfaces, and supporting board bring-up and hardware validation.
Implement secure boot, firmware update mechanisms (MCUboot, DFU), and over-the-air (OTA) functionality when required.
Develop automated unit tests, integration tests, and hardware-in-the-loop testing using Zephyr’s testing frameworks (Twister, ztest).
Guide and support integration of firmware into CI/CD pipelines, including automated builds, regression testing, static analysis, and deployment workflows.
Partner with hardware, BMC/RMC, security, systems, and validation teams to drive alignment across the entire platform stack.
Debug complex hardware/firmware/system issues in lab and production environments. Provide debugging and root-cause analysis using tools such as JTAG/SWD, logic analyzers, and Zephyr tracing/logging systems.