Principal Fabric/Network Architect

Neurophos • Austin, TX

1d • $250,000 - $300,000 • Onsite

About The Position

Neurophos is developing a novel approach to AI compute using silicon photonics to perform matrix multiplications at the speed of light, aiming for significantly higher energy efficiency and performance compared to traditional electronic circuits. We have assembled a world-class team and recently raised a $110M Series A. We are seeking a Principal Network Architect to own the datacenter scale-out architecture for our T100 platform. This role is crucial for ensuring that our novel accelerator can be effectively fed with data at scale. The position involves owning the entire data path, from the Linux host networking stack through our electronic integrated circuit (EIC) acting as a PCIe bridge, out to third-party NICs, and back via DMA into HBM. The ideal candidate will have experience building production RDMA transports, be proficient in both kernel networking code and PCIe protocol details, and be capable of writing specifications for digital design and software teams. This role also includes defining the long-term architectural vision for a Neurophos DPU.

Requirements

• BS/MS/PhD in Computer Science, Electrical Engineering, or a related field.
• 10+ years in datacenter networking architecture, including RDMA transports deployed at scale.
• Deep working knowledge of the Linux host networking stack: kernel networking, VFIO, DPDK or libfabric, and IOMMU/IOVA behavior.
• PCIe fluency: root complex versus endpoint roles, bridges, peer-to-peer transactions, ACS, and Gen5/Gen6 signaling and protocol.
• Familiarity with merchant NIC and switch silicon.
• Demonstrated ability to write architecture specifications that digital design and software teams can implement against.
• Excellent communication skills and comfort leading cross-functional technical discussions.

Nice To Haves

• Participation in the Ultra Ethernet Consortium (UEC) or a comparable standards body.
• DPU or SmartNIC architecture experience.
• Congestion control design and evaluation.
• Experience bringing a novel accelerator into a production datacenter network.
• Familiarity with collective communication libraries (NCCL, RCCL, or equivalent) and distributed inference serving.
• Understanding of ML inference workload characteristics and their network demands.
• Experience with hyperscaler qualification and deployment processes.

Responsibilities

• Own the end-to-end scale-out data path architecture spanning host network stack, EIC PCIe bridge, NIC attachment, and DMA into HBM.
• Define the transport and offload architecture, including RoCEv2 (RDMA over Converged Ethernet v2) and Ultra Ethernet Transport (UET).
• Specify peer-to-peer DMA topology and access control services (ACS) policy across the PCIe hierarchy.
• Define queue and completion semantics exposed to the runtime, in partnership with the software team.
• Drive NIC vendor selection and own the technical engagement with networking silicon partners.
• Model and evaluate collective communication performance for distributed inference workloads.
• Own the architectural case and roadmap for a future Neurophos DPU (data processing unit) and for scale-up fabric in a later phase.
• Represent Neurophos in relevant standards bodies and the data center networking community.
• Establish networking architecture practices and mentor engineers across Architecture and Software.

Benefits

• 100% coverage of base health plan premiums for you and your dependents, plus HSA contributions.
• Unlimited PTO.
• 401(k) matching and stock option opportunities.
• Full suite of voluntary benefits, including Dental, Vision, Life, Hospital, Critical Illness, and Accident insurance.
• Personalized Benefits: Choose the plans that fit your life and take the cash back for those that don’t.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal