Principal Engineer, Infrastructure Hardware

SiTime Corporation•Santa Clara, CA

6d•$148,320 - $203,940

About The Position

SiTime is seeking a hands-on Principal Infrastructure Hardware Engineer to architect, design, and deliver system platforms that support characterization, validation, ATE, and high-volume manufacturing of SiTime products. This is a technical leadership role without direct reports, suited to a senior designer who takes deep technical ownership and influences cross-functional teams. The engineer will own hardware design from architecture through production release, develop modular platforms for multiple product lines, and lead prototype bring-up, debug, characterization, and validation. The role includes collaboration with fabrication and assembly partners, ODM/OEM partners, external compliance labs, and internal hardware teams. The listed pay range is $148,320–$203,940 USD. The role is also eligible for a quarterly bonus tied to innovation goals and equity grants. SiTime offers a 401(k) plan and benefits covering medical, dental, vision, life, parental leave, legal services, and time off plans.

Requirements

MS in Electrical Engineering or equivalent experience.
At least 7 years of hands-on experience designing complex system hardware for high-volume products.
Proven ability to deliver hardware from concept through production.
Deep expertise in board, package, socket, and manufacturing technologies.
Strong experience in SI/PI, high-speed digital, and mixed-signal design.
Proficiency with OrCAD, Allegro, ADS, HFSS, or equivalent tools.
Experience working with ODM/OEM partners and external compliance labs.
English proficiency, including the ability to communicate, collaborate, and perform job responsibilities in a professional business environment.

Responsibilities

Own end-to-end system hardware design from architecture through production release.
Define system architecture, schematics, PCB stack-ups, and layout constraints.
Drive component selection and vendor strategy, balancing performance, cost, quality, and supply.
Lead signal integrity and power integrity (SI/PI), power delivery network (PDN) design, and advanced simulations for low-jitter, high-speed interfaces.
Drive DFM, DFA, and DFT reviews with fabrication and assembly partners.
Lead hands-on prototype bring-up, debug, and characterization.
Perform system-level failure analysis and root-cause debugging.
Use high-end laboratory equipment, including oscilloscopes and phase-noise analyzers.
Develop modular, reusable platforms supporting multiple product lines.
Mentor and review designs across hardware teams.
Communicate technical status, risks, and trade-offs to stakeholders.