Principal Engineer, Hardware Emulation

Samsung Semiconductor•San Jose, CA
•$219,000 - $351,000•Onsite

About The Position

The Principal Engineer, Hardware Emulation works with leading emulation vendors to improve platform capabilities and resolve issues. The role brings up emulation platforms for mixed-signal SoCs and develops monitors and checkers. It also involves diagnosing emulation performance and area issues and developing and maintaining the emulation environment, infrastructure, and chip-level emulation models used to validate networking-chip subsystems. The engineer supports emulation methodology and tools, creates workflows, and collaborates across teams to improve productivity in debug and runtime analysis. The position works with simulation, firmware, software test, and hardware design teams to validate chips before silicon, bring up and debug software tests on emulators, triage design issues, and reproduce failures observed in real silicon. The position is based at the San Jose office and requires daily onsite presence.

Requirements

  • Bachelor’s degree in Computer, Electrical, or Electronic Engineering or Computer Science with 20 years of relevant experience, or a master’s degree in one of these fields with 18 years of relevant experience; described as preferred.
  • Emulation experience with Palladium or Zebu.
  • Experience with emulation compile flows, waveform dumping and triggers, waveform debugging, and running tests.
  • Experience writing scripts in Perl or Python.
  • Exposure to Makefiles or other build flows.
  • Experience with waveform debugging tools such as Verdi or SimVision.
  • Good understanding of Verilog and SystemVerilog RTL design.
  • Exposure to synthesizable SystemVerilog or Verilog code and SVAs.
  • Strong communication skills and ability to work as a team player.
  • Inclusive, adaptable, curious, resilient, collaborative, innovative, and creative approach to work.

Responsibilities

  • Bring up emulation platforms for mixed-signal SoCs and develop monitors and checkers for the platform.
  • Debug emulation performance and area issues.
  • Develop and maintain the emulation environment and infrastructure.
  • Own and maintain chip-level emulation models for validating networking-chip subsystems.
  • Work with emulation vendors as needed to address hardware and tool issues.
  • Enhance emulation methodology for robustness, test throughput, portability, and debuggability.
  • Collaborate with simulation, firmware, and software test teams to validate chips before silicon.
  • Support software-test bring-up and debugging on hardware emulators and collaborate with hardware design teams to triage and resolve design issues.
  • Apply knowledge of simulation-based design verification flows to emulation test planning and execution.
  • Work across simulation, firmware, and software test teams to reproduce failures observed in real silicon on the emulator.
  • Develop workflows and support tools for emulation debug and runtime analysis.

Benefits

  • Medical, dental, and vision benefits
  • 401(k)
  • Incentive opportunities based on individual and company performance
  • Charitable giving match and opportunities to participate in community activities
  • Four or more weeks of paid time off per year, plus holidays and sick leave
  • Fertility-care or adoption stipend, caregiver support, and medical travel support
  • On-demand wellness apps and free confidential therapy sessions
  • Onsite café and gym, plus virtual classes
  • Flexible work environment
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