Principal Engineer, CAD

SiTime Corporation•Tempe, AZ

21h

About The Position

SiTime is the Precision Timing company, providing MEMS-based Precision Timing solutions that power over 400 applications in high-growth areas like AI datacenters, automated driving, industrial and humanoid robots, wearables, and IoT. The Principal Engineer, CAD will provide CAD Software support for Digital, Analog, and Mixed-Signal designs using Cadence, Synopsys, Siemens, Keysight, and 3rd party vendor tools. This role involves user support for various design stages, CAD tool customization, Linux support, and the implementation and testing of new software tools and flows. The engineer will also interface with EDA Tool Vendors for new software release testing and deployment across multiple engineering sites.

Requirements

BA/BS Degree in Electrical Engineering, Computer Science, or related field.
Minimum 7 years of experience with analog and digital new product development CMOS IC CAD support using EDA tools.
Must have experience supporting: Cadence Virtuoso Schematic Editor and Layout Suite, Spectre, Spectre-RF, Multi-Mode Simulator, Physical Layout tools, Assura, PVS, Pegasus, Innovus, Tempus.
Must have experience supporting: Siemens Analog Fast-Spice, Questa, Parasitic CALIBRE PVS, XRC.
Must have experience supporting: Synopsys Design Compiler, VCS, SpyGlass, and other tools.
Programming languages: DFII SKILL, PERL, MATLAB, Tcl/Tk, C/C++, Python.
Proficient at Linux OS, utilities, and scripting.

Nice To Haves

Excellent written and verbal communication skills required.
Ability to work well with others in a fast-paced collaborative team environment.
Strong problem-solving skills, attention to detail, and a proactive approach to continuous improvement.

Responsibilities

Provide full lifecycle support for custom CAD flows, including tool development, installation, configuration, maintenance, and upgrades across Cadence, Synopsys, Siemens, and Keysight platforms.
Own PDK installation, validation, customization, maintenance, and release management, ensuring alignment with foundry and keeping up-to-date versions ready.
Support and maintain end-to-end tapeout flows, including coordinating and executing tapeout submissions to foundries, ensuring compliance with foundry requirements, schedules, and quality standards.
Support Schematic Capture, Analog and Mixed-signal Simulation, Layout, and Layout Verification software and workflows using established revision-controlled processes.
Support and maintain digital simulation, verification environments, and digital place-and-route tools.
Develop and maintain CAD utilities, automation scripts, and regression flows to improve design efficiency and consistency.
Perform Functional Evaluation, Performance Benchmarking, and Deployment of New Tools.
Provide CAD Software & Linux User Support for CMOS Design Engineers & IC Layout Designers.
Prepare and maintain clear user documentation, best practices, and training material for design teams across sites.
Responsible for diagnosis, resolution, and regression of reported problems in a timely manner.
Interfacing directly with EDA Vendors’ Application and support teams to resolve and influence product improvements.
Support additional CAD-related initiatives and projects as assigned.