Principal Electrical Engineer

Mercury Systems•Phoenix, AZ

65d•Onsite

About The Position

Mercury Systems is seeking the best and brightest engineering talent to help us deliver cutting‑edge technology for mission‑critical aerospace and defense applications, advancing innovation where it matters most. In this role, our team is looking for a Principal Electrical Engineer who will serve as a Hardware Design/Substrate Design technical leader, driving the development of rugged, high‑reliability microelectronics for defense, aerospace, and space systems. You will lead substrate and hardware design from concept through delivery, shaping engineering standards, guiding complex technical decisions, and ensuring extreme reliability in the harshest environments. Working within Mercury’s Integrator Mindset, you will collaborate across sites and disciplines to create breakthrough microelectronic solutions that directly strengthen national security and support onshore trusted manufacturing.

Requirements

Bachelor’s or higher-level degree in Electrical Engineering, Computer Engineering, or equivalent
Typically requires a minimum of 6 years of microelectronics packaging experience
Experience leading microelectronics packaging efforts across cross‑functional engineering teams
Strong expertise in electronic circuit design, schematic capture, and troubleshooting across digital, analog, and power circuits
Deep knowledge of high‑speed digital design, signal‑integrity fundamentals, IC package stack ups and advanced packaging techniques
Experience working directly with substrate and interposer fabricators
Experience mentoring junior engineers and leading engineering activities or small technical teams
This position requires you to have or obtain a government security clearance. Security clearances may only be granted to U.S. citizens.

Nice To Haves

Experience with FPGA‑based designs using Intel (Altera) or AMD (Xilinx)
Experience working with high‑frequency DACs and ADCs
Development experience with embedded high‑speed interfaces (25G+)
Proficiency with Cadence Allegro APD for layout analysis and design review
Extensive understanding of signal‑integrity principles for high‑speed digital designs
Understanding of RF design fundamentals for microelectronic applications
Experience using requirements‑management or collaboration tools such as JAMA, JIRA, or Confluence
Familiarity with DFM, DFT, DFR, and cost‑conscious design methodologies
Experience supporting proposals, cost/schedule estimates, and Basis of Estimate (BOE) development
Active DoD Secret Clearance or the ability to obtain one

Responsibilities

Lead cross‑functional teams to architect and develop complex System‑in‑Package (SiP) designs from concept through production
Manage the design of microelectronic digital and RF packaged circuits that meet system and customer requirements
Execute microelectronics hardware development involving FPGAs, DACs, ADCs, storage devices, and other advanced components
Design and analyze high‑speed digital interfaces including Ethernet, PCIe, DDR, SATA, USB, and other mission‑critical interfaces
Lead design quality activities through peer reviews, verification practices, and rigorous testing to minimize integration risk.
Coordinate with manufacturing and test teams to resolve build issues, support DFM/DFA/DFT efforts, and participate in detailed failure investigations
Develop schematics and layout for SiPs using Cadence toolsets and collaborate closely with layout and signal‑integrity teams
Provide hands‑on support during SiP layout and perform signal‑integrity analysis to ensure robust high‑speed performance
Support proposal development by contributing technical architectures, cost and schedule estimates, and Basis of Estimate (BOE) inputs