Principal Electrical Design Engineer

Astera Labs•San Jose, CA

2d•$185,000 - $240,000

About The Position

Astera Labs is seeking a Principal Electrical Design Engineer to define and lead the architecture, design, and technical strategy for advanced board-level hardware used in next-generation networking and high-performance connectivity platforms. The work spans complex systems such as chassis boards, NIC cards, PCIe Gen6 platforms, and 800G Ethernet products. This principal-level technical leadership role sets board-architecture direction, establishes scalable design methodologies, advances high-speed system design, and provides technical authority across multiple programs. The engineer partners with silicon, signal and power integrity, mechanical, firmware, manufacturing, system, and executive teams to deliver products from concept through production and beyond. The position also mentors senior and lead engineers and represents the hardware engineering organization in executive reviews, customer engagements, and industry forums as needed.

Requirements

Bachelor’s or master’s degree in Electrical Engineering or a closely related field.
At least 12 years of progressive hardware design experience, with deep board-level electrical engineering expertise and technical leadership across multiple product generations.
Extensive experience architecting and delivering production hardware at scale for server, networking, storage, or high-performance computing systems.
Expert-level experience with high-speed SerDes-based systems supporting Ethernet, PCIe, or related protocols, including hands-on PCIe Gen5/Gen6 and 400G/800G Ethernet system design.
Expert understanding of signal-integrity fundamentals, including impedance control, differential-pair routing, channel-loss optimization, crosstalk mitigation, and high-speed-interface layout review.
Expert power-integrity and power-delivery-network design knowledge, including sequencing, decoupling, transient response optimization, and system-level power-architecture tradeoffs.
Mastery of industry-standard schematic-capture and PCB design and review tools such as Cadence Allegro or OrCAD.
Proven ability to lead hardware bring-up and debug of complex platforms using oscilloscopes, protocol analyzers, and advanced lab instrumentation.
Demonstrated ability to lead cross-functional teams and influence technical direction across organizational boundaries from architecture through validation and production.
Strong track record of mentoring engineers and elevating team capabilities.

Nice To Haves

Advanced degree in Electrical Engineering or a closely related field.
Experience defining architectures for NIC cards, accelerator cards, or other PCIe add-in card platforms across multiple generations.
Experience leading server chassis or system-board design programs in dense, thermally constrained, high-availability environments.
Deep expertise in 800G Ethernet and emerging 1.6T electrical interfaces and system-integration challenges.
Experience architecting solutions using retimers, redrivers, advanced clocking architectures, and high-speed interconnect subsystems.
Expertise in PCIe and Ethernet compliance and validation workflows, including contributions to industry specifications or standards bodies.
Experience driving contract-manufacturer relationships, production-ramp strategies, and yield optimization for complex hardware products.
Proficiency in Python or similar scripting languages for lab automation, measurement analysis, hardware-characterization workflows, and design-flow optimization.
Experience influencing product strategy and roadmap decisions at the organizational level.

Responsibilities

Define and own board-level hardware architecture and technical roadmaps across product lines and platform generations.
Establish scalable design standards, methodologies, and best practices for the hardware engineering organization.
Drive architectural tradeoffs for complex multilayer PCBs integrating high-speed digital, analog, and mixed-signal circuitry, balancing performance, cost, schedule, and manufacturability.
Drive discussions on stack-up strategy, impedance optimization, and related signal-integrity development.
Own power-delivery architecture strategy, including regulation topologies, sequencing, transient response, protection, and platform power budgets.
Define hardware implementation strategies for management and control interfaces, including I2C, SPI, GPIO, and MDIO, as well as debug and observability architectures.
Own schematic capture and board-level design for complex multilayer PCBs.
Provide technical authority and oversight for board-level hardware development and designs across server and connectivity platforms, including NIC cards, PCIe add-in cards, and chassis-integrated hardware.
Lead component strategy and qualification roadmaps with suppliers, sourcing, and manufacturing teams.
Drive design-for-test, design-for-manufacturing, and design-for-reliability initiatives to improve manufacturability, yield, reliability, and production readiness.
Define and own bring-up and validation strategy for new hardware platforms and establish frameworks to improve first-pass success rates.
Lead root-cause analysis of escalated hardware issues involving high-speed interfaces, power delivery, clocks, resets, and control paths.
Improve debug methodologies, validation coverage, and failure-analysis processes.
Partner with firmware, software, and system teams to define and validate initialization sequences, telemetry, diagnostics, and platform functionality.
Own corrective-action frameworks and incorporate lessons learned into design standards and review processes.
Serve as the technical escalation point and decision-maker for hardware design challenges across the organization.
Coordinate with signal-integrity, power-integrity, mechanical, thermal, firmware, system, and manufacturing teams throughout the product lifecycle to align work and resolve technical conflicts.
Work strategically with silicon vendors and internal ASIC teams on platform architecture, bring-up, errata resolution, compliance, and next-generation readiness.
Mentor and develop senior and lead engineers and raise technical capabilities across the hardware engineering team.
Lead and contribute to design and architectural reviews and technical publications.
Represent the hardware engineering organization in executive reviews, customer engagements, and industry forums as needed.