Principal, Analog Design Engineering

Micron Technology • Boise, ID

1d

About The Position

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! As a Principal Analog Design Engineer, you will help shape the next generation of Micron’s memory products. You’ll work closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry.

Requirements

• Solid circuit design fundamentals and demonstrated experience and silicon success in mixed-signal or analog IC design.
• Experience designing regulators, charge pumps, oscillators, current references, bandgaps, or comparators.
• Proficiency with SPICE and Verilog modeling and simulation.
• Experience collaborating with technical and non‑technical teams.
• Bachelor’s degree in Electrical Engineering with 2+ years of semiconductor design or manufacturing experience.

Nice To Haves

• Minimum MSEE + 8 years or BSEE + 10 years of mixed‑signal or analog IC design experience.
• 5+ years of circuit debugging experience with cross‑functional teams.
• Strong experience with UNIX and the Cadence design environment (schematic, simulation, SPF extraction)
• Familiarity with Synopses tools.

Responsibilities

• Design, optimize, and verify block‑level analog and mixed-signal circuits for DRAM projects.
• Propose and evaluate new or improved circuit topology to further enhance PPAC of the circuit block.
• Improve design verification scope and coverage to increase circuit robustness to enhance mass production yield.
• Partner with global design groups and provide layout guidance through post‑layout simulation.
• Compare silicon performance with simulation results and support correlation activities.
• Operate with minimal supervision, defining solutions and methods independently.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Principal