Power & Performance Attainment Lead

Advanced Micro Devices, Inc

19d

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. We are seeking a seasoned SoC Design Engineer with deep expertise—or demonstrated passion—in power efficiency, thermal modeling, di/dt and droop analysis, and strong proficiency with power/performance tools complemented by a solid software background. The ideal candidate has a proven track record of driving product requirements, execution, and long‑term strategy for power/performance tools and methodologies. You are meticulous in balancing Power, Performance, and Area (PPA) while meeting aggressive schedules and cost targets. This senior‑level role offers the opportunity to shape new technical directions, collaborate with a world‑class, patent‑holding engineering community, and influence decisions across design teams, marketing, and business unit leadership. You bring strong communication and presentation skills, exceptional analytical and problem‑solving abilities, and demonstrated project leadership in complex environments. You are self‑directed, comfortable navigating ambiguity, and capable of leading through influence in a highly cross‑functional, matrixed organization. Mandatory experience includes pre‑silicon power/performance tool development, close collaboration with software and CAD teams, and deep domain knowledge in power efficiency and di/dt diagnostic coverage. Recognition as a thoughtful technical leader or industry methodologist in this space is highly valued. You are highly collaborative, adept at working with top engineers and senior architects across geographies, and motivated to mentor, guide, and elevate the technical capabilities of those around you. You have a proven ability to deliver high‑quality outcomes through influence rather than authority.

Requirements

strong communication and presentation skills
exceptional analytical and problem‑solving abilities
demonstrated project leadership in complex environments
self‑directed, comfortable navigating ambiguity, and capable of leading through influence in a highly cross‑functional, matrixed organization
pre‑silicon power/performance tool development
close collaboration with software and CAD teams
deep domain knowledge in power efficiency and di/dt diagnostic coverage

Nice To Haves

Demonstrated expertise in power diagnostic coverage, including socket‑ and platform‑level projections and identification of architectural worst‑case scenarios with system‑level correlation
Deep knowledge of power management microarchitecture, power optimization techniques, and power impact across architecture, logic, and circuit levels
Advanced experience with power‑constrained performance analysis and optimization of modern SoCs (CPU, GPU, and hardware accelerators)xcellent understanding of computer architecture and organization
Solid grasp of model‑based performance and power analysis, including power and thermal management practices
Strong analytical skills with attention to data quality; experience with data mining and machine learning is a plus
Experience analyzing CPU, GPU, or system‑level microarchitectural features to identify performance bottlenecks across workloads
Proficient programming skills, with Python preferred

Responsibilities

Advance state‑of‑the‑art power efficiency and diagnostic methodologies, including worst‑case workload analysis to define SoC and platform specifications
Drive end‑to‑end power/performance tools and flow development, spanning software and complete PPA methodologies
Partner with business units to define product configurations, capabilities, and targets relevant to power and performance domains
Lead performance profiling and power‑constrained optimization using modeling results to forecast and achieve targets across development cycles
Track simulation and/or emulation results and correlate silicon behavior with model predictions
Analyze underperformance using advanced methodologies and identify root causes
Coordinate and drive corrective action plans across teams