Power Integrity Engineer

Apple • San Diego, CA

3d

About The Position

We are looking for a dedicated and passionate SoC Power Integrity Engineer to join our team in Hardware Technology Group. In this role, you will be responsible for the development, implementation, and verification of Power Integrity solutions for compute and connectivity SoCs used in Apple devices (iPhone/iPad/Wearable/Mac/Home/Vision etc.). You will work with cross-functional teams to drive SoC power delivery architecture, define off-die droop budgets, design and implement power delivery network (PDN) solutions end-to-end PMU/PCB/Module/PKG/Die, and verify the quality of the power integrity performance and efficiency using advanced lab measurements.

Requirements

• Bachelor's degree required.

Nice To Haves

• M.S. or Ph.D. with academic background in Power/Signal Integrity, Power Electronics, Electromagnetics, Microwave, and/or Analog/RF Circuit Design.
• Proficiency in Python coding, AI/ML assisted automation experience.
• Experience in PI/SI methodology development, PDN modeling from system to die, and lab correlation/validation.
• Experience in design and analysis of product power supply solution.
• Understanding of power supply architecture covering voltage regulator technologies, PCB and package design trends and trade-offs, and chip supply design including low-power design methodologies.
• Deep understanding of Voltage Regulator design principles and electrical performance in the system environment.
• Good knowledge in 3D/2D EM simulation tools, electromagnetic and transmission line theory.
• Preferably working knowledge on analog/RF/wireless noise coupling and sensitivity
• Familiar with lab equipment including but not limited to VNA, real-time scope, spectrum analyzer.
• Ability to work and communicate efficiently in cross-functional teams

Responsibilities

• Definition of the PDN architecture and design solution space for systems across a wide range of power and noise specifications.
• Power delivery modeling, simulation, and characterization for die, package, module, board, and Voltage Regulator (VR)
• Definition of the PDN architecture and design solution space for the target system
• Broad responsibility on all SoC PI related topics, including on-die inrush, off-die droop budget, PDN signoffs, digital to analog/RF noise coupling analysis, voltage guard band, active droop mitigation etc.

What This Job Offers

• Job Type: Full-time
• Career Level: Entry Level