Post-Silicon Lab Manager
About The Position
Tenstorrent is seeking a hands-on, experienced Post-Silicon Lab Manager to own the post-silicon lab infrastructure and manage operational workflows supporting bring-up, system validation, and customer enablement for next-generation, high-performance RISC-V CPU architectures and advanced chiplet solutions. The role involves scaling lab infrastructure to support multiple programs, directing post-silicon validation engineers on cost-effective validation and debug infrastructure, and managing day-to-day lab operations. This is a hybrid role based in Santa Clara, CA. Candidates at various experience levels are welcome, and the appropriate level will be determined during the interview process.
Requirements
- B.S. or M.S. in Electrical Engineering, Computer Engineering, or a similar technical field.
- 8–12+ years in semiconductor hardware.
- 3+ years leading a post-silicon validation, characterization, or hardware lab team focused on CPUs.
- Knowledge of high-speed interfaces (PCIe, DDR/GDDR/HBM, SerDes) and fabric links in depth.
- Hands-on experience with board-level debug tools.
- Startup mindset; ability to stay calm and quick when troubleshooting physical hardware under tight tape-out and silicon-arrival deadlines.
- Clear communication skills across functions.
- Ability to keep remote, multi-site teams aligned from the Santa Clara hub.
- Eligibility to access U.S. export-controlled technology.
Responsibilities
- Run day-to-day lab operations for CPU post-silicon validation, power/performance assessment, and debug, with lab infrastructure aligned to tape-out and bring-up schedules.
- Lead the lab environment for first-silicon power-on, system bring-up, and platform validation, including board-level fixes to salvage eval boards or meet new validation needs.
- Deploy and maintain server racks, data acquisition, power telemetry rigs, and automated test benches for multi-core CPU and chiplet-based systems.
- Manage the CapEx budget for scopes, logic/protocol analyzers, and traffic generators.
- Own inventory, calibration cycles, silicon allocation tracking, and lab safety compliance using JIRA, Confluence, and lab scheduling tools.
- Communicate clearly across functions and keep remote, multi-site teams aligned from the Santa Clara hub.
Benefits
- Highly competitive compensation package
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
Education Level
Associate degree
