PMIC Reference HW Design Engineer

Qualcomm•San Diego, CA

3d•$141,300 - $211,900

About The Position

The QCT PMIC Systems group has an opening for a PMIC Reference HW Design Engineer. This group owns PMIC PCB design guidelines for Qualcomm chipset-based phone design. This includes design and optimization of PMIC PCB Floorplan, Schematic, Layout, phone thermal solution and eBOM selection for test platforms and customer reference design and evaluation kits. Qualcomm PMIC hardware design typically consists of modules such as switch-mode power supplies and linear voltage regulators for a variety of cores and peripherals, battery chargers, low noise clocks, ADCs, user interfaces such as display, camera flash and haptics, Power-on and Reset hardware. This is not a layout position.

Requirements

Bachelor's degree in Electrical Engineering or related field and 5+ years of Software, Hardware, Electrical, Systems, or related engineering work experience.
Master's degree in Electrical Engineering or related field and 4+ years of Software, Hardware, Electrical, Systems, or related engineering work experience.
PhD in in Electrical Engineering or related field and 2+ years of Software, Hardware, Electrical, Systems, or related engineering work experience.
2+ years of academic or professional experience using one or more of the following: IC design tools, PCB design tools, SPICE, MATLAB, Verilog/VHDL, C, Python.
Able to work with common lab test equipment (oscilloscope, spectrum analyzer, logic analyzer, network and impedance analyzer, etc.).
Experience in Power Management (SMPS, LDO, battery chargers, Clocks, ADC) PCB design and component selection including CAD interface.
Experience in high layer count multilayer boards (6/8/10 layers) preferred.
Good understanding of common Signal and Power Integrity issues on test hardware and ability to identify and provide alternate solutions using Signal and Power Integrity simulators (eg. powerSI, SIWave, Ansys) is also a plus.

Nice To Haves

Experience in Mentor PADs Logic and PADs Layout, DxDesigner and Expedition is desirable but not essential.
3+ years of mobile phone or similar product experience in power systems, power grid analysis and design, hardware or PMIC transistor level design or design/development of design tools and test automation tools.
3+ years of experience in one or more of the following areas: SMPS, LDO, Buck Converters, Boost Converters, Clock system generation and distribution, Battery charging and USB, Wireless battery charger, Battery fuel gauging, Haptics ERM/LRA, Precision references, Mobile phone hardware, PWB design, Chipset infrastructure and digital interfaces.
1+ year of experience working in a large matrixed organization.
1+ year of work experience in a role requiring interaction with leadership (e.g., Director and above).

Responsibilities

Design of customer reference board and evaluation kits and working closely with PMIC IC designers and Test HW platform teams for optimizing performance and cost on test hardware platforms.
Develop and publish PMIC PCB design guidelines, schematic, BOM selection and PCB layout (by working closely with CAD engineer) based on interaction with chipset architecture, chip design and test teams.
Perform the required board level simulations (based on Power Integrity and Signal Integrity tools) to review and sign off on hardware designs developed by various test teams.
Responsible for characterizing and publishing performance and cost optimized reference BOM lists (power inductors, capacitors, third party components etc) based on component characterization and BOM reduction and optimization tests in lab.