About The Position
NVIDIA is seeking a motivated Physical Design and Timing Engineer Intern to join their dynamic and growing team for Summer 2027. This role involves driving physical design, power, and timing closure for high-frequency and low-power designs, assisting with frontend and backend implementation from RTL to GDSII, and running physical design experiments to develop flows and methodologies. NVIDIA is a company that constantly reinvents itself, with a mission to amplify human inventiveness and intelligence.
Requirements
- Pursuing an MS or Ph.D. in Electrical or Computer Engineering.
- Familiarity with applying AI/ML techniques to physical design workflows to accelerate design, analysis, or automation tasks.
- Knowledge of or experience with Static Timing Analysis (STA), power analysis, and power reduction.
- Some experience in logic synthesis and equivalence checking.
- Experience with physical optimization, e.g., placement, routing, clock tree, etc.
- Some background in industry-standard EDA tools (e.g., Cadence, Synopsys, Siemens, etc.).
- Proficiency in programming and scripting languages such as Perl, Tcl, Make, Python, etc.
Nice To Haves
- Hands-on experience applying AI/ML models or LLM-based tools to solve EDA, design automation, or physical design problems.
- Previous work experience in physical design.
- Experience in methodology and/or flow development/automation.
Responsibilities
- Drive physical design, power, and timing closure for high-frequency and low-power designs.
- Help drive frontend and backend implementation in select areas, from RTL to GDSII.
- Run physical design experiments and help develop flows and methodologies.
Benefits
- Intern benefits
- Internship hourly rates are a standard pay based on the position, your location, year in school, degree, and experience.
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What This Job Offers
Job Type
Full-time
Career Level
Intern
