PERC ESD EDA Engineer

Intel Corporation•Austin, TX

6d•$111,030 - $211,200•Onsite

About The Position

Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. This position is within the Design Technology Platform (DTP) organization. At Intel, DTP is one of the key pillars enabling Intel to deliver winning products in the marketplace. The PERC ESD development team within this organization is looking for individuals who will be responsible to develop PERC ESD rule decks for latest Intel technologies. Your work will directly enable design teams to get to market faster with leadership products on cutting edge technologies. As part of the DTP/Process Design Kit (PDK) group, you will join a highly motivated team of top-notch engineers solving challenging technical problems enabling PDKs for Intel's most advanced process technologies and drive PDKs towards industry standard methods and ease of use for the end customers.

Requirements

Master's degree or PhD in Electrical Engineering, Computer Engineering or other relevant STEM degree.
1+ years of relevant industry experience in physical design verification (reliability, device physics, process technology, and design rules, extraction or related domains).
1+ years' experience with ESD PERC rule decks/runset development and debugging (or equivalent reliability/DRC tools).
1+ years' experience in scripting (e.g., Python, Tcl, Perl, or similar) for QA and flow automation.

Nice To Haves

Creative, independent, and "out of the box" thinker with strong analytical and problem-solving abilities.
Strong knowledge of ESD/LU PreSi models (HBM, CDM), I/O design, and related methodologies.
Strong attention to detail and excellent organization skills.
Ability to connect the dots across domains and propose cross disciplinary optimal solutions.
Self-drive with strong leadership skills; able to influence and align internal and external stakeholders.
Excellent written and verbal communication skills; able to present complex technical concepts clearly and concisely.
Proven success working with cross functional and cross site teams, with the ability to influence multiple internal and external partners.
Demonstrated ability to work in a fast paced, team-oriented environment and drive issues to closure.
Proven ability to work effectively in a dynamic, team-oriented environment.
Experience driving cross functional and industrywide initiatives or task forces.

Responsibilities

Develop ESD/LU rule decks aligned with the ESD Design Rule Manual (DRM) and reliability requirements.
Create and maintain reliability ESD and LU design rule methodologies and specifications.
Collaborate with internal design, reliability, and CAD teams as well as external EDA vendors to define and implement new tool features and requirements.
Build and execute test cases for rule debugging, validation, and signoff.
Define QA requirements and drive related automation to improve robustness and efficiency of rule checks.
Lead innovation initiatives to enhance existing ESD/LU verification automation, tools, and methodologies.
Identify and analyze ESD/LU design problems, define root causes, and drive practical solutions across teams.