PD Intern - Summer 2027

EtchedSan Jose, CA
Onsite

About The Position

As a Physical Design intern for Etched next summer, you will be responsible for realizing our front-end designs in silicon, helping Etched to improve iteration speed to final signoff. You will assist in developing and running Physical Design flows to synthesize blocks, automate final design checks, and advise RTL design decisions.

Requirements

  • Progress towards a Bachelor’s, Master’s, or PhD degree in electrical engineering, computer engineering, or a related field.
  • Familiarity with high-speed digital logic
  • Exposure to ASIC or SoC design concepts
  • Familiarity with SystemVerilog, UVM, or Python
  • Familiarity with verification work and writing test benches
  • Familiarity with physical design flows and tooling
  • Able to learn quickly about transformers and other aspects of modern artificial intelligence

Nice To Haves

  • Familiarity with transformer models and machine learning
  • Familiarity with numerical representations and functions (RTL)
  • Familiarity with clocking and reset schemes (RTL/PD)
  • UVM or formal verification experience (DV)
  • Ability to program with Python or another scripting language

Responsibilities

  • Realizing front-end designs in silicon
  • Developing and running Physical Design flows to synthesize blocks
  • Automating final design checks
  • Advising RTL design decisions

Benefits

  • 12-week paid internship
  • Generous housing support for those relocating
  • Daily lunch and dinner in our office
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