About The Position

NVIDIA is seeking a Package Layout Engineer to collaborate with the Technical Package Lead and design teams on sophisticated IC substrate layouts for NVIDIA products. The role involves implementing high-speed, high-density ASIC packages and working with design teams to plan schedules and address cost, manufacturing, and electrical design issues. The engineer will also conduct feasibility studies and develop design methodologies and CAD libraries to improve layout productivity.

Requirements

  • B.S. in Electrical Engineering or equivalent experience.
  • At least 2 years of experience in PCB layout for graphics cards, motherboards, line cards, or related technology.
  • Significant background with Cadence APD or SiP and/or PCB layout tools, including Constraint Manager.
  • Solid understanding of high-speed design signal-integrity practices.

Nice To Haves

  • Experience with HDI designs.
  • Experience in substrate layout of wire-bond and flip-chip packages.
  • Experience with Virtuoso and Calibre.
  • Experience using Valor.

Responsibilities

  • Collaborate with the layout team to implement high-speed, high-density ASIC packages.
  • Create substrate breakout patterns for ASIC packages.
  • Optimize package pinouts, incorporating system-level trade-offs in pin assignments.
  • Perform package routing, placement, stack-up, reference plane, and power distribution work using Cadence APD or SiP tools.
  • Propose layout design trade-offs to the Technical Package Lead for resolution and implementation.
  • Conduct design feasibility studies to evaluate package goals for size, cost, and system performance.
  • Develop symbols and CAD library databases using Cadence APD design tools.
  • Develop methodologies to improve layout productivity.
  • Work with design teams to plan schedules and resolve cost, manufacturing, and electrical design issues.

Benefits

  • Equity
  • Benefits
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