Package Assembly Process Development Integration Engineer

Intel Corporation•Chandler, AZ

5d•$89,010 - $170,630•Onsite

About The Position

As a Process Integration and Yield Engineer at Intel, you will play a pivotal role in driving technology transfer and optimizing manufacturing processes. You will define process integration roadmaps, establish workflows, and ensure continuous improvement. By leveraging data-driven insights and collaborating with stakeholders, your work will directly contribute to enhancing product quality, yield, and overall operational excellence. The Assembly Package Test Manufacturing (APTM) organization owns a fundamental and fast-growing portion of Intel's foundry business. In addition to traditional product types, we drive Intel's advanced packaging strategy. In the Package Assembly Process Development Integration Engineer role, you will be part of the Arizona Package Assembly Development Integration team within APTM owning development activities and running working groups and task forces to address key risks for key Intel Advanced Packaging Programs.

Requirements

Candidate must possess a Bachelor’s degree with 3+ years of experience, OR Master's Degree with 2+ years of experience, OR PhD degree in Engineering with 1+ years of experience.
Semiconductor experience
Manufacturing experience
Advance assembly packaging experience
Exceptional communication skills.
Collaboration
Innovative thinking
Attention to detail
Proactive problem-solving
Curiosity and continuous learning
Make technical decisions and provide technical direction
Effectively work in a highly networked, cross organization role
Exhibit strong team building and influencing skills

Nice To Haves

3+ years of experience in the following:
Focus on fundamental understanding of advanced packaging process development.
Knowledge of Package Assembly NPI methodology, DOE and statistical Process control.
Knowledge of characterization techniques such as CSAM, Xray, XPS, FTIR, SEM, EDX.
Experience in package design, assembly process interaction is a plus.

Responsibilities

Manage development and baseline data collection activities (for TV and Products).
Key contact for process level issues within package assembly
Manage DOE plans and data collection activities that support key technology development areas related to die-package interactions, process flow development and qualification, yield improvement, process spec validation, design rule validation, identify and implement cost effective wafer level / assembly / substrate solutions that enable a robust die-package process and architecture.
Manage substrates and materials to meet forecasted costs and schedule.
Engage and work closely with stakeholders to deliver holistic solutions to the problems.
Develop solutions to problems utilizing statistical knowledge and problem-solving tools.
Achieve timely results by working across organizational boundaries, fostering an inclusive and innovative culture.