About The Position

This role is with KBR’s Mission Tech Solutions (MTS). At KBR MTS, we don't just envision a world that's safer, more secure, and sustainable - we create it. Our legacy of delivering advanced full life cycle professional and technical solutions is matched only by our commitment to operational readiness and innovation. As stewards of critical missions for the Department of Defense, Intelligence Community, NASA, and other key federal entities, we excel in engineering, logistics, operations, science, program management, mission IT, and cybersecurity. United in our quest for excellence, KBR stands at the vanguard, ready to transform possibilities into impactful realities for a better tomorrow. As a National Security Solutions – FPGA Signal Processing Intern: Assists in developing, implementing, and testing signal processing algorithms on FPGA platforms for array-based systems. Designs and implements HDL (Verilog/VHDL) for DSP, data movement, and control logic Works on hardware implementations of beamforming and array processing algorithms and evaluates performance. Integrates FPGA designs with simulation models and testbenches for verification and validation. Builds and maintains performance evaluation frameworks to measure throughput, latency, and correctness. Brings up FPGA boards in the lab, runs experiments, and debugs functional and timing issues. Processes and visualizes signal and system performance data for analysis and reporting. Supports integration of FPGA-based signal processing into larger research or prototype workflows. Uses git-based workflows for version control, collaboration, and code review. Documents architectures, methods, assumptions, and results clearly for technical review. Collaborates with engineers and researchers to iterate on hardware/software co-design solutions. Selected interns for this paid opportunity will be provided with the opportunity to mentor with experienced professionals, gain experience and establish a name for themselves in this high demand career field.

Requirements

  • Currently pursuing a Master’s or PhD in Electrical Engineering, Computer Engineering, or a related field, or an advanced undergraduate with substantial FPGA project or lab experience.
  • Hands-on experience with FPGAs through coursework, research, internships, or significant projects.
  • Proficiency in HDL (Verilog and/or VHDL) for design, simulation, and debugging.
  • Experience with FPGA toolchains such as Vivado, Quartus, Libero, or similar.
  • Experience implementing and debugging digital signal processing algorithms in hardware, including filtering, FFTs, beamforming, or streaming pipelines.
  • Familiarity with fundamental signal processing concepts such as sampling, filtering, and FFTs.
  • Experience writing test benches and performing functional and/or timing verification.
  • Comfort working in a lab environment with hardware bring-up and debugging.
  • Experience with git or similar version control systems.
  • Strong analytical and problem-solving skills.
  • Strong written and verbal communication skills.
  • Prior research, lab, or project experience in FPGA, signal processing, or related hardware systems.
  • Strong work ethics and interpersonal skills.
  • Strong analytical and problem-solving skills.
  • Excellent written and verbal communication skills.
  • Must be a US Citizen
  • Must pass a Security Pre-Screen and have the ability to obtain a security clearance.

Responsibilities

  • Assists in developing, implementing, and testing signal processing algorithms on FPGA platforms for array-based systems.
  • Designs and implements HDL (Verilog/VHDL) for DSP, data movement, and control logic
  • Works on hardware implementations of beamforming and array processing algorithms and evaluates performance.
  • Integrates FPGA designs with simulation models and testbenches for verification and validation.
  • Builds and maintains performance evaluation frameworks to measure throughput, latency, and correctness.
  • Brings up FPGA boards in the lab, runs experiments, and debugs functional and timing issues.
  • Processes and visualizes signal and system performance data for analysis and reporting.
  • Supports integration of FPGA-based signal processing into larger research or prototype workflows.
  • Uses git-based workflows for version control, collaboration, and code review.
  • Documents architectures, methods, assumptions, and results clearly for technical review.
  • Collaborates with engineers and researchers to iterate on hardware/software co-design solutions.

Benefits

  • Mentorship from experienced subject matter experts
  • Cutting edge projects, relevant to real world challenges
  • Work in a collaborative and dynamic team environment
  • Networking opportunities with other technologists and executives
  • Competitive pay and great company culture
© 2024 Teal Labs, Inc
Privacy PolicyTerms of Service