Module Integration Engineer

Samsung Electronics•Taylor, TX

1d•Onsite

About The Position

Samsung Austin Semiconductor is a world leader in advanced semiconductor technology. The Module Integration Engineering (MIE) team drives new technology transfer, establishes process integration route, and enhances process margin, performance, yield, and reliability. This role involves performing 2 nm GAA source & Drain (SD) module integration projects, collaborating closely with Process Architect (PA), Process Integration Engineering (PIE), Fab Engineering (FE) units, Device & SRAM integration, DFM, and manufacturing teams.

Requirements

Master’s or PhD degree in Electrical Engineering, Physics, Materials Science, or a closely related field.
Minimum 8 years of experience on advanced node FinFet or GAA technology.
Front End of Line (FEOL) module process integration engineering experience.
Strong preference for Gate-All-Around (GAA) Source & Drain module integration engineering experience.
Device physics knowledge with hands‑on work in FinFET or Gate‑All‑Around (GAA) devices.
Knowledge of unit processes such as: lithography, dry / wet etch, CMP, diffusion, implant, thin‑film deposition, and metrology.
Expertise in Design of Experiments (DOE), and experience in Data analyses software (ex: JMP, Spotfire, etc.)
Experience leading projects and/or serving as a Task Force Team (TFT) lead.
Capable of shifting focus and changing priorities and ability to meet deadlines multiple priorities.
Interpersonal skills with the ability to influence, motivate, and align diverse stakeholders.
Excellent written and verbal communication skills.
Willing to work and learn in a fast-paced, cross‑functional, multicultural team environment.

Responsibilities

Execute the Front End of Line (FEOL) module setup plan—particularly the Source & Drain (SD) module—with minimal supervision to meet the aggressive qualification timeline.
Monitor line performance, intervene on off target SPC excursions, and develop improvement plans that satisfy process capabilities.
Lead engineering projects that drive high volume manufacturing (HVM) product qualification, yield ramp‑up, and performance target achievement.
Lead Task Force Teams (TFTs) to resolve systematic yield, performance, or reliability challenges.
Perform feasibility studies and create design of experiments (DOE) for performance and yield improvement throughout the product development cycle.
Produce written reports and deliver oral presentations for internal management and external partners.