About The Position

We are seeking a Mixed-Signal Verification Engineer III to verify analog and mixed-signal IP integrated into digital-on-top SoC environments on the Treo platform. This mid-level individual contributor role reports directly to the Analog Design Team Manager. You will own the development and execution of mixed-signal verification solutions, leveraging SystemVerilog and behavioral modeling to ensure power and clock IP meet functional and integration requirements prior to tape-out.

Requirements

  • Mixed-Signal Verification Engineer III role
  • Verify analog and mixed-signal IP integrated into digital-on-top SoC environments on the Treo platform
  • Leverage SystemVerilog and behavioral modeling

Responsibilities

  • Own the development and execution of mixed-signal verification solutions.
  • Leverage SystemVerilog and behavioral modeling to ensure power and clock IP meet functional and integration requirements prior to tape-out.

Benefits

  • Intelligent power and sensing technologies
  • Automotive, industrial, and AI data center markets
  • Vehicle electrification, sustainable energy, and advanced automation
  • 65nm Bipolar-CMOS-DMOS (BCD) technology
  • Supporting voltages from 1–90V
  • Operating temperatures up to 175°C
  • Scalable SoC solutions for automotive, medical, industrial, and AI data-center applications
  • Modular analog IP
  • Digital-on-top architectures
  • 300mm East Fishkill, NY fab
  • Disruptive innovations
  • Accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure
  • Highly differentiated and innovative product portfolio
  • Intelligent power and sensing technologies
  • Solving the world’s most complex challenges
  • Leading the way in creating a safer, cleaner, and smarter world
  • Equal Opportunity Employer
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