Mixed Signal Design Verification Engineer

Texas InstrumentsDallas, TX

About The Position

This position offers a great opportunity to work on some of TI's most advanced products. As a DMS/AMS DV Engineer, you will work closely with design, systems, verification, characterization, test and product engineers to define, develop, and productize the best chip design. Creative, innovative, detail-oriented engineers with strong team and customer interaction skills will find this to be an interesting and rewarding opportunity. In this role as a DMS/AMS DV Engineer your responsibilities will include: Digital Mixed Signal (DMS) Create real number models of analog blocks Execute full chip DV in a primarily digital environment Analog Mixed Signal (AMS): Execute full chip DV in a primarily AMS environment Improve NPD execution by defining and deploying verification best practices Improve product quality by identifying gaps in our verification methodology and driving improvements in the pre-RTM chip design flow Identify opportunities to deploy new best practices across all projects

Requirements

  • Bachelor's degree in Electrical Engineering or related field
  • 5+ years of verification experience
  • Strong verbal & written communications skills
  • Strong teaming skills supporting a positive, creative, innovative, and rewarding work culture
  • Inquisitive, interested, and analytical nature; strong problem solving/innovating skills

Nice To Haves

  • Master's or PhD degree in Electrical Engineering
  • Track record of success with NPD execution
  • DMS: real number modeling
  • AMS: verification experience across multiple silicon process technologies
  • Strong background in design tools and flows
  • Experience with analog and digital is preferred

Responsibilities

  • Create real number models of analog blocks
  • Execute full chip DV in a primarily digital environment
  • Execute full chip DV in a primarily AMS environment
  • Improve NPD execution by defining and deploying verification best practices
  • Improve product quality by identifying gaps in our verification methodology and driving improvements in the pre-RTM chip design flow
  • Identify opportunities to deploy new best practices across all projects
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