Mixed Signal Design Verification (MSDV) Engineer

Nexperia•Dallas, TX

23h

About The Position

Integrated Circuit Solutions (ICS) Group is seeking a highly motivated Mixed Signal Design Verification Engineer with a strong background in analog and mixed-signal IC design verification. In this role, you will be responsible for pre-tapeout verification of silicon design, ensuring the part will meet all stated specifications and behavior and is manufacturable and testable. Familiarity with power converters and the challenges of power design is a plus. This position requires strong communication skills and leadership qualities. The selected individual will assume a technical contributor role with the ability to identify and implement opportunities for continuous improvement and work collaboratively with a diverse team of analog and digital designers, layout engineers, and system architects to ensure first-pass silicon success and high-quality product delivery.

Requirements

Strong familiarity with EDA design tools such as Cadance Virtuoso design environment
Strong familiarity with analog, digital and mixed-signal design and tool flow
Extensive experience with Verilog/Verilog-A/SystemVerilog and Universal Verification Methodology (UVM) to run automated regressions
Working knowledge of Unix shell, TCL, Perl, Python and SKILL scripting languages
Excellent analytical, troubleshooting, and communication skills.
Bachelor’s, Master’s or PhD degrees in Electrical Engineering or related field of study

Nice To Haves

Experience developing verification environment for integrated circuits that incorporate I2C, PMBus or SPI type communication protocols
Understand power management chip architectures (ideal diodes, e-fuses, switching converters etc)
Experience with lab validation is a plus
Understand ESD, reliability, and electro-migration verification
Experience with semiconductor manufacturing processes and design-for-test methodologies.
Familiarity with version control systems such as DesignSync, SVN, Git.
Familiarity with power converters and the challenges of power design is a plus.

Responsibilities

Operate as DV lead to drive quality product tapeouts
Develop a detailed pre-Si verification plan, create simulation environments, and mixed-signal behavioral models and work closely with design and systems teams to execute automated regressions to ensure coverage goals are met
Interface across different functional groups such as systems, applications, test, silicon validation, etc. to ensure product design was verified correctly and completely and that end-product fits customer’s needs
Build relationships with internal teams by closely interacting with them to identify and solve design related problems
Analyze simulation results, identify root causes of failures, and provide actionable recommendations.
Participate in design reviews, verification reviews, and silicon bring-up activities.
Support post-silicon validation and correlation between simulation and measured silicon performance.