Mixed-Signal Design Developer
About The Position
As a senior member of the Mixed Signal Design team, you will be a key member of a small, dynamic IC Design group that develops high speed (>25Gb/s), and high accuracy, analog designs for optical communications products. You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products. You will lead efforts for a large block on a complex chip, mentor team members and track deliverables, participate in peer review of complex IC designs and provide solid design methodology from conception to production. You will also collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met. You are enthusiastic about developing high speed AMS circuits and best-in-class products that push the boundaries of what is possible. You are detail oriented, high energy and the drive to get things done and solve difficult problems. You are capable to figure things out by yourself, but you also participate in our friendly and team-oriented collaboration approach, which means you enjoy learning from your colleagues and letting them learn from you. You are not shy to always point out how we can be more effective as a team, and you are open to similar suggestions by your team members.
Requirements
- Bachelors + 12 years of related experience, or Masters + 8 years of related experience, or PhD + 5 years of related experience.
- Prior experience in the design, simulation, and measurement of high-speed ICs across at least three of the following areas: SerDes/serial links, output drivers, Phase Locked Loops (PLLs), clock distribution, Opamps/PGAs, or equalization techniques.
Nice To Haves
- Experience with electrical transceiver applications including backplane and cable communications.
- Experience in FinFET and GAA technologies.
- High-frequency layout experience including floorplaning (power/ground, digital/analog signal routing), passives components (inductors, transformers, and transmission-lins).
- Experience in design for manufacturability including characterization over PVT, electromigration analysis, self-heating, and IR drop analysis.
- Experience in laboratory validation including ESD practices/methodology and construction of test setups.
- Experience in design software including Cadence (Virtuoso), Specture/APS/SpectreX, layout validation tools (Virtuoso and Calibre), EMX, mixed-signal simulations in AMS, and Matlab.
Responsibilities
- Architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products.
- Lead efforts for a large block on a complex chip, mentor team members and track deliverables.
- Participate in peer review of complex IC designs and provide solid design methodology from conception to production.
- Collaborate with packaging and hardware design team to ensure signal and power integrity specifications are met.
Benefits
- medical, dental and vision insurance
- a 401(k) plan with a Cisco matching contribution
- paid parental leave
- short and long-term disability coverage
- basic life insurance
- restricted stock units
- 10 paid holidays per full calendar year
- 1 floating holiday for non-exempt employees
- 1 paid day off for employee’s birthday
- paid year-end holiday shutdown
- 4 paid days off for personal wellness
- 16 days of paid vacation time per full calendar year (non-exempt)
- flexible vacation time off program (exempt)
- 80 hours of sick time off provided on hire date and each January 1st thereafter
- up to 80 hours of unused sick time carried forward
- Optional 10 paid days per full calendar year to volunteer
- annual bonuses (for non-sales roles)
- performance-based incentive pay (for sales roles)
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What This Job Offers
Job Type
Full-time
Career Level
Senior
