Memory Electrical Validation Engineer

Intel Corporation•Hillsboro, OR

5d•Onsite

About The Position

Intel is shaping the future of technology to help create a better future for the entire world. Our work in pushing forward fields like AI, analytics, and cloud-to-edge technology is at the heart of countless innovations. With a career at Intel, you'll have the opportunity to use technology to power major breakthroughs and create enhancements that improve our everyday quality of life. Join us and help make the future more wonderful for everyone. Life at Intel The Role and Impact: Join Intel's Memory Validation Team as a Memory Electrical Validation Engineer, where you'll be at the forefront of cutting-edge memory technologies embedded in mobile and desktop CPU products. This role is pivotal in ensuring optimized electrical performance, compliance with industry standards, and system-level reliability for Intel's leading products. Your contributions will directly impact product quality and production success, driving Intel's innovation in memory interfaces and subsystems. Collaborate with multidisciplinary teams to define validation strategies, solve complex challenges, and deliver high-performing memory solutions that shape the future of technology.

Requirements

Bachelor's degree with 4+ years of experience, Master's degree with 3+ years of experience, or PhD and 1+ years' of experience in Electrical Engineering or a related field.
Experience in 1 or more of the following areas: 3+ years of experience Memory electrical validation, including signal integrity and signal margin validation (SIV/SMV).
3+ years of experience in Memory physical design or Mixed signal IP electrical validation.
3+ years of experience analog and mixed signal fundamentals, electrical calibration methodology, and memory validation/debug processes.

Nice To Haves

5+ years of experience in high-speed mixed signal design, high-speed IO electrical validation, or signal integrity analysis.
Familiarity with memory technologies such as DDR5 and LP5
Functional knowledge of Memory Reference Code (MRC) FW components for debug pathfinding to root cause.
Experience in technical leadership or team collaboration roles.

Responsibilities

Define electrical validation strategies for memory IO interfaces to achieve optimized performance and meet production goals.
Validate circuit analog performance, electrical signal integrity compliance, and system-level margin for stable operation and production targets.
Develop and optimize Memory Reference Code (MRC) requirements, analyzing and refining MRC steps and values for margin and quality improvements.
Design and execute validation procedures, infrastructure, and systems margin analysis.
Debug electrical design features, identifying root causes and resolving functional and triage failures.
Drive DOEs to root cause working with circuit and logic design teams
Test interactions between electrical design elements using validation infrastructure.
Collaborate with architecture, design, and pre-silicon verification teams to ensure robust validation of IO architectures.