Mask Layout Designer

Qualcomm•Markham, ON

4d•CA$46 - CA$68

About The Position

Develops block, macro, or chip level layouts and floorplans according to project requirements, specifications, and design schematics. Applies understanding of design manuals, established processes, layout elements, and basic electronic principles to create accurate designs that meet project needs. Conducts analyses, tests, and verifies designs using different tools and techniques to identify and troubleshoot issues, and stays abreast of new verification methods. Works with multiple internal and external stakeholders to align on projects, provide updates, and resolve issues.

Requirements

Bachelor's degree in Electrical Engineering, Computer Science, Mathematics, Electronic Engineering, or related field and 4+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
Associate's degree in Computer Science, Mathematics, Electrical Engineering or related field and 6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
High School diploma or equivalent and 8+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design), or related work experience.
4+ years of experience using layout design and verification tools (e.g., cadence, LVS, rmap).

Nice To Haves

Master's degree in Technology, Electrical Engineering, Electronic Engineering, or related field.
6+ years of experience designing custom layouts in a specific relevant technology (e.g., FINFET, CMOS, GATE ARRAY).
6+ years of experience designing custom layouts in relevant domain (e.g., analog, mixed signal, RF, digital design).
2+ years in a technical leadership role with or without direct reports.
3+ years of work experience in a role requiring interaction with senior leadership (e.g., Sr Director level and above).
1+ year of working with operating budgets and/or project financials.
1+ year in a leadership role with direct reports (applies only to those with direct reports).

Responsibilities

Leads team to read and develop highly complex project requirements and specifications; interprets schematics to understand macro level layout design needs.
Leads team to define and build macro level layouts and floorplans based on in-depth understanding of layout techniques, design elements, requirements (e.g., PPA, yield), and electronic principles (e.g., currents, resistance, parasitic).
Develops and communicates guidelines, processes, design rule manuals, and checklists across teams; identifies and recommends improvements to guidelines and manuals to facilitate high-quality, accurate designs that meet standards.
Manages the testing and validation of top-level designs against specifications using layout and verification tools (e.g., Cadence, LVS, rmap) to identify errors and ensure layouts can be built by manufacturing.
Provides guidance on gathering information and conducts advanced analyses and sign-off to identify where an issue has occurred; helps team troubleshoot and debug complex technical issues.
Develops new ways to accomplish work and/or improves or automates existing methods to increase efficiencies for the team; helps others to learn new approaches.
Displays deep knowledge of industry trends and developments related to mask layout tools and techniques; integrates advancements into one's work and helps team do the same.
Re-scopes projects, identifies and reassigns resources, and reviews the work of team members in order to address changing timelines or priorities.
Leads management of team project priorities, deadlines, and deliverables for mid- to large-sized projects; leads multiple projects.
Collaborates closely with key internal teams (e.g., Engineers, Program Management, and Business Operations) and external stakeholders (e.g., PVERF, PDCAD, QDA, Foundry, SoC) to identify needs, share updates, and resolve complex issues in a timely manner.