LSDC Verification Lead- CPU Cores

Advanced Micro Devices, IncFishkill, NY
Onsite

About The Position

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. THE ROLE: We are looking for an outstanding candidate to provide technical leadership for load store verification execution for our next generation products. You will maintain and improve existing functional verification methodology, improve existing infrastructure, and work on related projects and/or assignments as needed to meet team goals. Additionally, you will perform project definition, training and documentation. Finally, you will work with architects and TG/PG RTL/Designers and develop an effective working relationship with parties involved.If this sounds like you, we welcome you to apply!

Requirements

  • BS or MS with significant industry experience desired (all degrees are related to CS or EE).
  • Experience with Verilog/SystemVerilog HDL, programming in Perl, C/C++
  • Logic simulation experience is a big plus
  • Direct experience with Verilog simulators is a plus.
  • Strong understanding of computer architecture and assembly programming

Nice To Haves

  • Outstanding foundation in CPU Architecture
  • Significant expertise in Load store verification execution
  • Industry experience as a technical Leader for load store verification
  • Understanding or technical expertise in functional verification of microprocessor designs

Responsibilities

  • Perform functional feature verification of high speed Microprocessor designs, including development of infrastructure, directed and random test suites at behavioral RTL level across SoC, Core and block hierarchies
  • Develop environments, infrastructure and test plans to accommodate both full chip and stand alone block level verification and debug capabilities using simulation tools, debug tools and programming skills, based on in-depth understanding of the architecture and HDL/logical design of the microprocessor
  • Develop an automated regression infrastructure setup for functional verification of high speed microprocessor designs.
  • Based on thorough understanding of the design architecture, develop, run and debug x86 assembly based directed tests and random exercisers to validate functionality and testability operation of the microprocessor design C/C++/Perl/assembly programming, logic design and simulation skills
  • Resolve all simulation discrepancies and assertion responses for both behavioral and gate level logic models.
  • Measure and analyze coverage results and take vital actions to fill in coverage holes
  • Support next-gen LSDC rewrite

Benefits

  • AMD benefits at a glance.
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