Low Yield Analysis Engineer on Shift

Intel•Hillsboro, OR

2d•Onsite

About The Position

APTD LYA is a Foundry Labs Network organization that supports back-end package assembly and wafer level assembly sort and test fails to help root cause yield loss and in-line failures. In this electrical-characterization hybrid role, the engineer on shift will be responsible for technical functions such as design, test, checkout, modifications, and characterization of wafer level assembly technologies. Engineers on back or front of week shift schedules will help bridge support between engineering technicians, as well as shift 1 engineers and module partners, yield support, integration and both internal and external customers in a collaborative environment. As an LYA Engineer, you will set priorities for the platform/project, get results across boundaries, and ensure an inclusive work environment. In this role, engineers can expect to work with a team of engineers and engineering technicians to conduct various analyses and engineering tests to provide platforms with root cause determination of in-line electrical failures and perform defect and/or process characterization in support of identifying key mechanisms that contribute to root cause identification.

Requirements

Must possess a Master's Degree or higher in Materials Science and Engineering, Mechanical Engineering, Chemical Engineering, Electrical Engineering, or Chemistry and Physics or related field
At least 1 years of prior lab experience
Experience with defect characterization or electrical fault isolation techniques either through previous work, school work, or internships.

Nice To Haves

Prior experience working in a lab environment.
Experience with destructive and optical analysis techniques such as manual cross-sectioning and delayering, SEM, x-ray, microscopy, CSAM, ion milling, TEM and FIB
Experience performing electrical fault isolation and failure analysis on product and TV through the use of hand probe, curve trace, auto probing, TDR, EOTPR, EBAC, RIDR, and/or ELITE.
Experience with chemical compositional analysis techniques such as EDX. AFM, FTIR, Raman, and diffraction techniques such as XRD and EBSD.
Knowledge of package or die mapping software EX: Mentor Graphics, SysNav/CadNav, FIELD and expertise in SQL scripting and basic statistical analysis tools such as JMP are a plus.
Ability to communicate findings verbally and through reports to yield engineers, LYA analysts, and other customers.
Ability to work in a collaborative manner with a variety of different individuals in a fast paced, technical environment.
Ability to work effectively in an ambiguous environment where changing priorities and the norm.

Responsibilities

Working across team boundaries to achieve strategic objectives and meet program deliverables.
Understand program milestones and schedules then translate into team objectives and drive execution.
Interface with a wide variety of internal teams, as well as external suppliers to improve yield and drive innovation.
Project management, package design and/or development and sustaining support for integrated circuit or semiconductor assemblies, as well as various other electronic components and/or completed units.
Conduct hands-on lab work, define data acquisition strategy and data analysis plan, and recommend corrective actions and/or fixes to internal customers.
Develop failure analysis innovative techniques, BKMs, and/or approaches to accelerate failure identification and mechanism understanding.
Provide consultation concerning packaging and/or assembly problems and improvements in the manufacturing process.
Respond to customers' requests or events as they occur.
Candidate should be capable of working effectively across organizational boundaries.
Candidate must exhibit the following traits/skills: Work with ambiguity and flexibility with respect to job roles and working hours, have strong analytical and problem-solving skills, and possess robust communication and presentation skills.