Lead Photonics Validation Engineer

Cisco•Santa Monica, CA

1d•$151,300 - $216,200

About The Position

The Outshift by Cisco team is one of Cisco’s most visible innovation organizations, driving the next generation of transformative technologies and business opportunities. You will collaborate with some of the company’s most forward-thinking researchers, engineers, and technology leaders. Within the Outshift Quantum Research team and Quantum Labs, we are pioneering the design and development of practical, scalable, and efficient quantum networking technologies — foundational building blocks for the future Quantum Internet. Our multidisciplinary team of scientists and engineers is dedicated to advancing the state of the art in quantum networking, distributed quantum systems, and quantum-enabled applications. Cisco Quantum Research is seeking a skilled Photonic Validation Engineer to support our Quantum Experimental Team in a role that is central to the physical realization of Cisco's deployable quantum hardware platforms.

Requirements

Bachelors + 8 years of related experience, or Masters + 6 years of related experience, or PhD + 3 years of related experience, or equivalent related work experience.
2+ years of experience in test development, test automation, or hardware validation for complex optoelectronic, photonic, high-speed RF, or quantum systems.
Experience writing code with Python or MATLAB for test automation, data analysis, and hardware instrument control.
Experience with standard optical characterization equipment.
Experience writing technical documentation, test protocols, FAT/SAT procedures, and validation reports.
Experience reading, interpreting, and producing engineering drawings, schematics, and assembly procedures

Nice To Haves

Experience developing electronics and control systems for lasers, electro-optic modulators, optical switches, photonic integrated circuits, or other photonic devices.
Experience with precision timing, synchronization, and systems requiring tight latency control.
Experience designing low-noise power distribution and electronics for sensitive instrumentation.
Familiarity with high-speed data converters and interfaces such as JESD204B/JESD204C, Ethernet, and SFP-based interfaces.
Experience with EDA tools such as Altium Designer or Cadence Allegro and signal-integrity/RF simulation tools such as Ansys HFSS, Keysight ADS, or HyperLynx.
Knowledge of EMC/EMI design practices and UL/CE certification requirements.
Experience designing electronics and cable/interconnect systems for rack-mounted instrumentation.
Background in classical optics, quantum optics, quantum networking, photonics, or precision instrumentation.

Responsibilities

Define and implement verification protocols to validate complex photonic and electronic performance metrics (e.g., entanglement fidelity, extinction ratios, dark count rates, coincidence counts, and insertion loss) under full system integration.
Author clear, standardized test plans, Factory Acceptance Testing (FAT) protocols, Site Acceptance Testing (SAT) runbooks, and detailed performance reports that give external enterprise customers absolute confidence in our delivery.
Act as the diagnostic bridge between hardware, optics, software, and systems engineering—pinpointing root causes of inter-subsystem anomalies, cross-talk, and signal degradation to drive design iterations.
Play a key role in establishing the assembly and test infrastructure that will support the scaling of Cisco's quantum hardware platform delivery.
Develop comprehensive test plans, validation matrices, and automated test scripts to verify both individual subsystem specifications and full-system multi-subsystem functionality.
Build automated data acquisition (DAQ) and instrument control setups (using Python, LabVIEW, or MATLAB) to streamline routine testing of photonic switches, detectors, laser sources, and time-tagging/coincidence electronics.
Establish reproducible baseline benchmarks for key quantum and classical metrics, ensuring long-term operational stability and repeatability across manufacturing units.
Perform functional and parametric testing on standalone subsystems.
Implement integrated multi-subsystem co-validation to identify complex issues such as thermal drift, RF noise pickup, optical back-reflections, clock synchronization offsets, and control logic timing race conditions.
Author standardized Factory Acceptance Test (FAT) and Site Acceptance Test (SAT) execution procedures and technical sign-off criteria.
Document, analyze, and present statistical test data, error propagation analyses, and pass/fail reports for engineering review and customer compliance packages.
Maintain clear, traceable revision-controlled test logs, non-conformance reports (NCRs), and bug/issue tracking entries for hardware and software teams.