Lead Packaging Engineer

Diraq • Palo Alto, CA

64d • $200,000 - $260,000 • Onsite

About The Position

The Lead Packaging Engineer is responsible for the end‑to‑end architecture, development, and delivery of advanced packaging solutions for Diraq’s silicon‑based quantum processors. This role plays a critical leadership position in defining packaging strategies that enable scalable, high‑performance quantum systems, balancing electrical performance, thermal management, mechanical integrity, and manufacturability. Working at the intersection of device engineering, system architecture, and semiconductor manufacturing, the Lead Packaging Engineer collaborates closely with internal engineering teams and external industry partners to co‑develop and deploy state‑of‑the‑art packaging technologies that support Diraq’s roadmap from R&D through to scaled production.

Requirements

• Bachelor’s degree (or higher) in Mechanical Engineering, Electrical Engineering, Materials Science, or a related field
• Significant industry experience in advanced semiconductor packaging for high‑performance or deep‑tech hardware
• Demonstrated expertise in: PCB and/or substrate design for high‑density electronics
• Demonstrated expertise in: Mechanical design for semiconductor assemblies
• Demonstrated expertise in: Failure analysis, reliability testing, and qualification processes
• Strong understanding of thermal management and mechanical reliability in complex electronic systems
• Proven track record of delivering robust, scalable hardware solutions from concept through manufacturing
• Experience working across cross‑disciplinary engineering teams and with external manufacturing partners
• Ability to operate effectively in a fast‑moving R&D environment with evolving technical requirements

Nice To Haves

• Experience with cryogenic electronics or quantum, superconducting, or ultra‑low‑temperature systems
• Experience supporting technology transfer from R&D into pilot or volume manufacturing
• Exposure to semiconductor foundry or OSAT environments
• Prior technical leadership or mentoring responsibilities

Responsibilities

• Lead the architectural definition, design, and execution of advanced packaging solutions for quantum processor chips and multi‑chip modules
• Own packaging concepts from early feasibility and prototyping through qualification and production readiness
• Partner closely with device, system, RF, and thermal engineering teams to align packaging designs with performance, thermal, reliability, and integration requirements
• Drive the selection and implementation of advanced semiconductor packaging technologies, including:
• Provide technical leadership on PCB and substrate design, signal integrity, power delivery, and cryogenic‑compatible materials
• Lead mechanical design considerations, including stress management, CTE mismatch, and assembly robustness
• Own and guide failure analysis and reliability investigations, working with internal teams and external labs to identify root causes and implement corrective actions
• Engage directly with foundries, OSATs, substrate vendors, and research partners to co‑develop next‑generation packaging capabilities
• Contribute to technology roadmaps, risk assessments, and design trade‑off decisions at the program and company level
• Mentor and technically guide junior engineers and cross‑functional collaborators

Benefits

• Paid time off to volunteer for a cause you’re passionate about
• Opportunity to work with a talented team of professionals and world experts in the quantum computing field and a distinguished senior leadership team and Board
• A dynamic, supportive, and innovative work environment with opportunities for personal and professional growth
• Exposure and education from leading experts in the ground-breaking technologies that are shaping the future of quantum computing

What This Job Offers

• Job Type: Full-time
• Career Level: Senior