Lead Design Engineer

CadenceSan Jose, CA
$171,481 - $213,200Hybrid

About The Position

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences. Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence. Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

Requirements

  • Master’s degree in Electrical Engineering, Computer Science, or related field
  • Minimum five (5) years of experience in the job offered or in a related engineering occupation.
  • High-Speed Double Data Rate (DDR) Serdes Intellectual property (IP) and design
  • Hardware design and manufacturing principles with experience in printed circuit boards (PCB), interposers, sockets, and via technology
  • Full system signal integrity with channel extractions and mask compliance
  • Analog Integrated Circuit Layout design and simulation for stackup, power grid and via process
  • Lab validation and post silicon characterization with equipment such as oscilloscope, vector network analyzer (VNA), function generator, and spectrum analyzer
  • Analog Mixed Signal Design for noise analysis and high-speed IPs analog circuit blocks including Continuous Time Linear Equalizer (CTLE), Decision Feedback Equalizer (DFE), and Feed-Forward Equalizer (FFE)

Responsibilities

  • Research, design, develop, and test electronic components and systems for Electronic Design Automation (EDA) and semiconductor intellectual property (IP) employing knowledge of electronic theory and materials properties.
  • Perform modeling and simulation of high-speed interface interconnects/channel.
  • Work in lab to perform measurement, and correlate measurements to simulations.
  • Work with silicon designers, platform designers, package designers, and electrical validation teams to support interconnect and interface performance requirements.
  • Contribute to package and platform design guidelines development.
  • Review and evaluate package and board design and provide review feedback.
  • Responsible for electrical modeling and simulation of high-speed IO interconnects, such as Double Data Rate (DDR).
  • Define and evaluate circuit design features required to support interconnect performance requirements.
  • Create signal measurement test plans and review measurement results.
  • Correlate measurements to simulations and modify models as required.
  • Support signal integrity tool and methodology development.

Benefits

  • paid vacation
  • paid holidays
  • 401(k) plan with employer match
  • employee stock purchase plan
  • a variety of medical, dental and vision plan options
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