Layout/Mask Designer

Apple•Cupertino, CA

4h•$148,987 - $218,000•Onsite

About The Position

Design complex circuit layout for mixed signal, and analog circuits in deep sub-micron CMOS technologies. Review and analyze floorplans and complex circuits with circuit designers. Run complete set of design verification tools available on analog/mixed-signals blocks. Work with circuit design and other teams to plan/schedule work. Interpret checks including LVS, DRC and ERC to find the fastest way to complete layout and work on getting the best layout possible for the circuit. Work on achieving set of specifications for a particular circuit.

Requirements

Master’s degree or foreign equivalent in Electrical Engineering or related field and 1 year of experience in the job offered or related occupation.
Using ICManage tool to navigate and create project related technology config, workspace, LEF (Library Exchange Format).
Using Voltus to navigate, debug and fix EMIR violations.
Creating leaf cell and block level Floorplan in various designs (analog mixed signal and high-speed analog) and making connections (transistors, clock signals and data-path).
Analyzing RC (resistance & capacitance) extraction to debug and fix layout mismatches.
Performing schematic ID by identifying critical signals (high speed, static/dynamic, high current).
Providing circuit designers with recommendations on technology impact (know what design rule checks (DRC) are possible or not.
Using PDV tool to debug and fix complex DRC and LVS violations: Latch-up, ESD, transistor hookup errors & short circuits.
Using Virtuoso tool to efficiently create various groups, width/Space patterns (WSP), toolbar, layout editor, layer manipulation, check in & check out data, XL compliant.

Responsibilities

Design complex circuit layout for mixed signal, and analog circuits in deep sub-micron CMOS technologies.
Review and analyze floorplans and complex circuits with circuit designers.
Run complete set of design verification tools available on analog/mixed-signals blocks.
Work with circuit design and other teams to plan/schedule work.
Interpret checks including LVS, DRC and ERC to find the fastest way to complete layout and work on getting the best layout possible for the circuit.
Work on achieving set of specifications for a particular circuit.