IOMMU Design Verification Engineer

Advanced Micro Devices, IncVancouver, BC
Hybrid

About The Position

The AMD IOHUB Team (part of the NBIO organization) is looking for an ASIC Design Verification Engineer to join our growing team. We develop leading-edge I/O connectivity and virtualization technologies powering data center and machine learning workloads. This team is part of the development for tomorrow’s client, server, embedded, graphics, and semi-custom chips. You will be involved in all aspects of IP verification starting from helping to create a verification architecture, defining test plans, verification environment development, and verification closure/sign-off. As a key contributor to the success of AMD’s IP, you will be part of a leading team to drive and improve AMD’s abilities to deliver the highest quality, industry leading technologies to market. The NBIO Team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

Requirements

  • Strong ASIC verification experience is required
  • Strong understanding of digital design and computer architecture
  • Proficient in Verilog, System Verilog, C/C++, UVM, OOP, and working in Linux and Windows environments
  • ASIC design knowledge and be able to debug System Verilog RTL code using simulation tools

Nice To Haves

  • Experience in security verification would be an asset

Responsibilities

  • Collaborate with IP architects to come up with verification architecture and development plans
  • Participate in verification of complex IP blocks and take end-to-end ownership of key features for all projects
  • Work on test plans, verification environment development, regression, and coverage closure
  • Develop modifying and maintaining VIP, libraries, verification environments, testcases (random and directed) using System Verilog/UVM/SystemC
  • Triaging and Debugging Regressions
  • Analyzing code and functional coverage
  • Deploying industry-leading verification methodologies such as UVM and formal Verification
  • Reproducing functional bugs found in Post-Silicon in dynamic simulation and/or formal verification environments
  • Conducting and participating in code reviews
  • Develop and maintain scripts and tools to continuously improve in engineering infrastructure, methodology and execution

Benefits

  • AMD benefits at a glance
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