Intern - Advanced DRAM Cell/Device Engineer

Micron Technology • Boise, ID

1d

About The Position

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron's Boise R&D site, the DRAM Technology Development organization drives innovation in next-generation memory solutions. The team develops advanced DRAM cell architectures, access devices, and integration technologies that enable future scaling, improved performance, enhanced reliability, and manufacturing readiness. Engineers work across device, process integration, modeling, design, and product engineering teams to bring groundbreaking memory technologies from concept to production. The DRAM Device & Cell Technology Engineer plays a key role in defining, developing, and optimizing future DRAM cell and access device technologies. This position combines semiconductor device physics, silicon experimentation, electrical characterization, and data-driven decision making to improve cell performance, density, retention, reliability, and manufacturability. The successful candidate will collaborate with multi-functional teams to influence technology roadmaps and support the transition of new innovations into manufacturing.

Requirements

• M.S. or Ph.D. in Electrical Engineering, Materials Science, Applied Physics, or a related technical field.
• Demonstrated knowledge of semiconductor device physics, including MOSFET operation, access devices, and capacitor fundamentals.
• Experience with electrical characterization, device testing, statistical analysis, and interpretation of large experimental data sets.
• Familiarity with DRAM operational concepts, including activation, sensing, retention, and disturb mechanisms.
• Proficiency with data analysis and scripting tools such as Python, MATLAB, JMP, or similar platforms, along with AI Proficiency.

Nice To Haves

• Experience in DRAM or NAND device development, characterization, or technology research.
• Hands-on experience with TCAD simulation tools such as Synopsys Sentaurus or Silvaco.
• Knowledge of semiconductor fabrication processes, advanced BEOL integration, reliability mechanisms, and device variation analysis.
• Demonstrated ability to lead complex experimental programs and drive multi-functional alignment.
• Experience Leveraging AI, Large Language Models (LLMs), AI-Enabled analytics, or AI Supported engineering workflows to improve research productivity and technical insights.

Responsibilities

• Define electrical performance targets for DRAM access devices, capacitors, and cell stack elements, and evaluate new device architectures, materials, and integration schemes.
• Design and execute silicon experiments; perform electrical characterization and statistical analysis to find opportunities for device, process, and design improvements.
• Analyze array-level behavior including sensing margins, activation characteristics, disturb mechanisms, retention performance, and read/write operation interactions.
• Partner with modeling, design, process integration, and manufacturing teams to validate device behavior, optimize technology solutions, and support technology transfer to high-volume manufacturing.
• Apply AI-Assisted and Generative AI tools, where appropriate, to enhance data analysis, workflow efficiency, and technical decision-making.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Intern