IC Design Engineer

Broadcom•San Jose, CA

2d•$141,300 - $226,000

About The Position

As a member of the ASIC Implementation team, you will be part of the team implementing new technologies in a variety of exciting consumer electronic devices. You will be directly involved in: Leading a Synthesis and Timing of complex designs, provide guidance, interface with RTL team for quality RTL delivery Full chip and Block constraints development and constraints generation. Full chip and Block Synthesis, STA and timing closure Interfacing with internal external teams including Design, IP, Library Methodology & Flow development of Synthesis, Formality, STA, Low power checks & Timing Closure: Working independently with the PNR & RTL design team on Physical implementation and Power-intent requirements

Requirements

Should have done multiple Tapeouts
Extensive experience in frontend tools such as Primerime, DC, VCLP, Formality, LEC, Timing closure and timing
Extensive knowledge of PT/DC is important
Good in tcl scripting
Bachelors in Engineering and 12+ years of related experience or Masters degree in Engineering and 10+ years of related experience

Responsibilities

Leading a Synthesis and Timing of complex designs
Provide guidance
Interface with RTL team for quality RTL delivery
Full chip and Block constraints development and constraints generation
Full chip and Block Synthesis, STA and timing closure
Interfacing with internal external teams including Design, IP, Library Methodology & Flow development of Synthesis, Formality, STA, Low power checks & Timing Closure
Working independently with the PNR & RTL design team on Physical implementation and Power-intent requirements